參數(shù)資料
型號: S1C88848D0A0100
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝: DIE-192
文件頁數(shù): 82/174頁
文件大?。?/td> 1304K
代理商: S1C88848D0A0100
164
EPSON
S1C88848 TECHNICAL MANUAL
APPENDIX B DIFFERENCES FROM S1C8F360
APPENDIX B DIFFERENCES FROM S1C8F360
The S1C8F360 microcomputer with Flash built-in can be used as a development tool for the S1C88848.
The table below summarizes the functional differences between the S1C8F360 and the S1C88848.
Function
SVD
LCD power supply
Initial reset sequence
Memory size
External memory access
LCD drive duty
Package
Infrared remote-control carrier output
Programmable timer
DC output option for segment pins
Output port
I/O port
Analog comparator
Successive approximation type A/D
DC characteristics
I/O memory map
VOSC pin
Load resistance between VSS and VC1
CR oscillation characteristic
OSC3 oscillation characteristic (crystal)
SVD reset
Remote-control (REM) status after an
initial reset
S1C8F360
A/D conversion type
00FF12H is different from the S1C88848
TYPE B
VC5 (max.) = 6.38 V (LCx = FH)
VC1 standard (1/4 bias) is not supported
After an initial reset, only the OSC1
oscillation circuit starts operating and the
OSC1 clock is used as the CPU clock.
ROM: 60K
RAM: 2K
Supported
1/17 is not supported
QFP21-176pin (24
× 24mm2)
Pin layout is compatible with the S1C88848.
Not supported
8-bit
× 2 ch. or 16-bit × 1 ch.
Not available
R00 to R51 (34 bits)
P00 to P07, P10 to P17 (16 bits)
Available
See the S1C8F360 Technical Manual.
Input port (Kxx) high-level input voltage
(VIH) and low-level input voltage (VIL) are
different from the S1C88848.
See the S1C8F360 Technical Manual.
Provided. A capacitor is required.
Required
See the S1C8F360 Technical Manual.
Crystal oscillation start time: max. 20 ms
Provided
Not provided
S1C88848
Comparator type
TYPE B
VC5 (max.) = 5.7 V (LCx = AH)
Supports VC1 standard (1/4 bias)
After an initial reset, both the OSC1 and
OSC3 oscillation circuit start operating and
the OSC3 clock is used as the CPU clock.
ROM: 48K
RAM: 1.5K
Not supported
Supports 1/17 duty
QFP15-128pin (14
× 14mm2)
Pin layout is compatible with the S1C8F360.
Supported
8-bit
× 4 ch. or 16-bit × 2 ch.
Up to 11 bits are available
R26, R27, R34, R50, R51 (5 bits)
P10 to P17 (8 bits)
Not available
See Chapter 7, "Electrical Characteristics".
Kxx incorporates Schmitt circuit
See Section 5.1, "I/O Memory Map".
Not provided
Not required
See Chapter 7, "Electrical Characteristics".
Crystal oscillation start time: max. 50 ms
Not provided
After an initial reset, the remote controller
operates with the OSC3 clock regardless of
whether the REM output option is selected
or not. When the remote controller is not
used, it should be turned OFF in the initial
routine that will be executed after an initial
reset to reduce current consumption.
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