參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 122/174頁
文件大?。?/td> 1304K
代理商： S1C88848D0A0100
S1C88848 TECHNICAL MANUAL
EPSON
43
5 PERIPHERAL CIRCUITS AND THEIR OPERATIO (I/O Ports)
P10D–P17D: 00FF63H
How I/O port terminal P1x data readout and
output data settings are performed.
When writing data:
When "1" is written: HIGH level
When "0" is written: LOW level
When the I/O port is set to output mode, the data
written is output as is to the I/O port terminal. In
terms of port data, when "1" is written, the port
terminal goes to HIGH (VDD) level and when "0" is
written to a LOW (VSS) level.
Even when the port is in input mode, data can still
be written in.
When reading out data:
When "1" is read:
HIGH level ("1")
When "0" is read:
LOW level ("0")
When an I/O port is in input mode, the voltage
level being input to the port terminal is read out.
When terminal voltage is HIGH (VDD), it is read as
a "1", and when it is LOW (VSS), it is read as a "0".
Furthermore, in output mode, the contents of the
data register are read out.
At initial reset, this register is set to "1" (HIGH
level).
The data registers of I/O ports set for the output
terminal of serial interface can be used as general
purpose registers with read/write capabilities
which do not affect I/O activities of the terminals.
IOC10–IOC17: 00FF61H
Sets the I/O ports to input or output mode.
When "1" is written: Output mode
When "0" is written: Input mode
Reading:
Valid
IOC1x is the I/O control register which correspond
to each I/O port in a bit unit.
Writing "1" to the IOC1x register will switch the
corresponding I/O port P1x to output mode, and
writing "0" will switch it to input mode.
At initial reset, this register is set to "0" (input
mode).
The data registers of I/O ports set for the input
terminal of serial interface can be used as general
purpose registers with read/write capabilities
which do not affect I/O activities of the terminals.
5.6.5 Programming note
When changing the port terminal from LOW level
to HIGH with the built-in pull-up resistor, a delay
in the waveform rise time will occur depending on
the time constant of the pull-up resistor and the
load capacitance of the terminal. It is necessary to
set an appropriate wait time for introduction of an
I/O port. Make this wait time the amount of time
or more calculated by the following expression.
Wait time = RIN x (CIN + load capacitance on the
board) x 1.6 [sec]
RIN: Pull up resistance Max. value
CIN: Terminal capacitance Max. value
5.6.4 Control of I/O ports
Table 5.6.4.1 shows the I/O port control bits.
Table 5.6.4.1 I/O port control bits
Address Bit
Name
SR R/W
Function
Comment
10
00FF61 D7
D6
D5
D4
D3
D2
D1
D0
IOC17
IOC16
IOC15
IOC14
IOC13
IOC12
IOC11
IOC10
P17 I/O control register
P16 I/O control register
P15 I/O control register
P14 I/O control register
P13 I/O control register
P12 I/O control register
P11 I/O control register
P10 I/O control register
0
R/W
Output
Input
00FF63 D7
D6
D5
D4
D3
D2
D1
D0
P17D
P16D
P15D
P14D
P13D
P12D
P11D
P10D
P17 I/O port data
P16 I/O port data
P15 I/O port data
P14 I/O port data
P13 I/O port data
P12 I/O port data
P11 I/O port data
P10 I/O port data
1
R/W
High
Low
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