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參數(shù)資料
| 型號： | S1C88848D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192 |
| 封裝： | DIE-192 |
| 文件頁數(shù)： | 29/174頁 |
| 文件大小： | 1304K |
| 代理商： | S1C88848D0A0100 |
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116
EPSON
S1C88848 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Remote Controller)
The carrier output starts using the write signal for
this register and the carrier output will be ON from
the rising edge of the
τ waveform immediately after
that until the period set in the register has passed.
In other words, the register data is valid only one
time after writing. Consequently, data must be
written every time even when outputting the same
data successively.
ROUT is set to "0H" at initial reset and when REMC
is set to "0". Consequently, after turning the REM
circuit ON ("1" is written to REMC), REM output
becomes low level (VSS) until a value other than
"0H" is written to ROUT.
Figure 5.13.5.4 shows the timing of data writing to
the ROUT register and the carrier output.
Register
writing
ROUT1–0
τ waveform
REMOUT
REM (R26)
terminal
20
2
1
Fig. 5.13.5.4 Carrier output timing
Note: The values set in ROUT is taken into the
REMOUT time generator synchronously with
the rise of a
τ waveform. For this reason,
avoid writing data into the ROUT register
during one carrier cycle immediately before
and after the rise of the
τ waveform.
■ Remote controller (REM) interrupt
The carrier output ON time for one transmission
data bit is controlled by writing data to the above
mentioned REM output ON time setting register
ROUT. The OFF time is from when the output is
turned OFF to when the next carrier output starts
by writing to the same register. Since the carrier
output is turned ON at the rising edge of the
τ
waveform after writing data, the next data must be
written during the last
τ cycle in the carrier OFF
period of the current transmission data. To decide
its timing, an interrupt is used in the hard-timer
mode.
By using the interrupt, the CPU is released from the
processing such as a timing watch, and can execute
other processing.
The timing to generate interrupt can be set by the
software using
τ cycle as reference the same as the
carrier output width. The interrupt timing can be
selected by writing data to the REM interrupt
generation counter setting register RIC3–RIC0.
The time until an interrupt request occurs (tRI) is
given by:
tRI = tRIC + (1 ± 1 instruction cycle)
Where tRIC is the time set by RIC. The relation
between RIC and tRIC is:
tRIC = (RIC3
× 23 + RIC2 × 22 + RIC1 × 2 + RIC0) × τ
As with the REMOUT time generator, the REM
interrupt counter starts counting synchronously
with the rising edge of the
τ waveform. The
interrupt control circuit generates a REM interrupt
synchronously with the
τ pulse when the count is
completed.
ROUT writing
RIC writing
ROUT1–0
RIC3–0
Carrier
τ waveform
REM (R26) output
Interrupt signal
Interrupt request
11
12
Fig. 5.13.5.5 REM interrupt timing
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