參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 101/174頁
文件大?。?/td> 1304K
代理商： S1C88848D0A0100
24
EPSON
S1C88848 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map)
Table 5.1.1(k) I/O Memory map (00FF70H–00FF78H)
Address Bit
Name
SR R/W
Function
Comment
10
00FF70 D7
D6
D5
D4
D3
D2
D1
D0
HZR51
HZR50
HZR4H
HZR4L
HZR1H
HZR1L
HZR0H
HZR0L
R51 high impedance control
R50 high impedance control
General-purpose register
Reserved register
0
R/W
Hi-Z
1
Output
0
00FF71 D7
D6
D5
D4
D3
D2
D1
D0
HZR27
HZR26
HZR25
HZR24
HZR23
HZR22
HZR21
HZR20
R27 high impedance control
R26 high impedance control
General-purpose register
GP register/SEG47 high impedance control
GP register/SEG48 high impedance control
GP register/SEG49 high impedance control
GP register/SEG50 high impedance control
Reserved register
*1
0
R/W
Hi-Z
1
1/Hi-Z
Output
0
0/Output
00FF72 D7
D6
D5
D4
D3
D2
D1
D0
HZR37
HZR36
HZR35
HZR34
HZR33
HZR32
HZR31
HZR30
GP register/SEG40 high impedance control
GP register/SEG41 high impedance control
GP register/SEG42 high impedance control
R34 high impedance control
GP register/SEG43 high impedance control
GP register/SEG44 high impedance control
GP register/SEG45 high impedance control
GP register/SEG46 high impedance control
0
R/W
1/Hi-Z
Hi-Z
1/Hi-Z
0/Output
Output
0/Output
*1
00FF75 D7
D6
D5
D4
D3
D2
D1
D0
R27D
R26D
R25D
R24D
R23D
R22D
R21D
R20D
R27 output port data
R26 output port data
General-purpose register
GP register/SEG47 output port data
GP register/SEG48 output port data
GP register/SEG49 output port data
GP register/SEG50 output port data
Reserved register
*1
00FF76 D7
D6
D5
D4
D3
D2
D1
D0
R37D
R36D
R35D
R34D
R33D
R32D
R31D
R30D
GP register/SEG40 output port data
GP register/SEG41 output port data
GP register/SEG42 output port data
R34 output port data
GP register/SEG43 output port data
GP register/SEG44 output port data
GP register/SEG45 output port data
GP register/SEG46 output port data
1
R/W
1/High
High
1/High
0/Low
Low
0/Low
00FF78 D7
D6
D5
D4
D3
D2
D1
D0
–
R51D
R50D
–
R51 output port data
R50 output port data
Constantly "0" when
being read
–
1
0
R/W
–
High
–
Low
1
1 2
1
R/W
High
1
1/High
Low
0
0/Low
*1
*1 The SEGxx high-impedance control and SEGxx output port data bits are effective only when the SEGxx terminal is configured
for DC output. The bit corresponding to the SEG terminal that is configured for LCD segment output can be used as a general-
purpose register. The SEG terminals to be used for DC output can be selected from among SEG40–SEG50 by mask option.
*2 "0" when TOUT output or REM output is selected by mask option.
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