參數(shù)資料
型號： S1C88848D0A0100
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC192
封裝： DIE-192
文件頁數(shù)： 140/174頁
文件大?。?/td> 1304K
代理商： S1C88848D0A0100
60
EPSON
S1C88848 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface)
PMD: 00FF48HD5
Selects odd parity/even parity.
When "1" is written: Odd parity
When "0" is written: Even parity
Reading:
Valid
When "1" is written to PMD, odd parity is selected
and even parity is selected when "0" is written. The
parity check and addition of a parity bit is only
valid when "1" has been written to EPR. When "0"
has been written to EPR, the parity setting by PMD
becomes invalid.
At initial reset, PMD is set to "0" (even parity).
TXEN: 00FF49HD0
Sets the serial interface to the transmitting enable
status.
When "1" is written: Transmitting enable
When "0" is written: Transmitting disable
Reading:
Valid
When "1" is written to TXEN, the serial interface
shifts to the transmitting enable status and shifts to
the transmitting disable status when "0" is written.
Set TXEN to "0" when making the initial settings of
the serial interface and similar operations.
At initial reset, TXEN is set to "0" (transmitting
disable).
TXTRG: 00FF49HD1
Functions as the transmitting start trigger and the
operation status indicator (transmitting/stop
status).
When "1" is read:
During transmitting
When "0" is read:
During stop
When "1" is written: Transmitting start
When "0" is written: Invalid
Starts the transmitting when "1" is written to
TXTRG after writing the transmitting data.
TXTRG can be read as the status. When set to "1", it
indicates transmitting operation, and "0" indicates
transmitting stop.
At initial reset, TXTRG is set to "0" (during stop).
RXEN: 00FF49HD2
Sets the serial interface to the receiving enable status.
When "1" is written: Receiving enable
When "0" is written: Receiving disable
Reading:
Valid
When "1" is written to RXEN, the serial interface
shifts to the receiving enable status and shifts to the
receiving disable status when "0" is written.
Set RXEN to "0" when making the initial settings of
the serial interface and similar operations.
At initial reset, RXEN is set to "0" (receiving disable).
RXTRG: 00FF49HD3
Functions as the receiving start trigger or prepara-
tion for the following data receiving and the opera-
tion status indicator (during receiving/during stop).
When "1" is read:
During receiving
When "0" is read:
During stop
When "1" is written: Receiving start/following
data receiving preparation
When "0" is written: Invalid
RXTRG has a slightly different operation in the clock
synchronous system and the asynchronous system.
The RXTRG in the clock synchronous system, is
used as the trigger for the receiving start.
Writes "1" into RXTRG to start receiving at the
point where the receive data has been read and the
following receive preparation has been done. (In
_________
the slave mode, SRDY becomes "0" at the point
where "1" has been written into into the RXTRG.)
RXTRG is used in the asynchronous system for
preparation of the following data receiving. Reads
the received data located in the received data buffer
and writes "1" into RXTRG to inform that the
received data buffer has shifted to empty. When "1"
has not been written to RXTRG, the overrun error
flag OER is set to "1" at the point where the follow-
ing receiving has been completed. (When the
receiving has been completed between the opera-
tion to read the received data and the operation to
write "1" into RXTRG, an overrun error occurs.)
In addition, RXTRG can be read as the status. In
either clock synchronous mode or asynchronous
mode, when RXTRG is set to "1", it indicates
receiving operation and when set to "0", it indicates
that receiving has stopped.
At initial reset, RXTRG is set to "0" (during stop).
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