參數(shù)資料
型號(hào)： NAND08GW3B2CZL1F
廠商： NUMONYX
元件分類： PROM
英文描述： 1G X 8 FLASH 3V PROM, 25000 ns, PBGA52
封裝： 12 X 17 MM, 1 MM PITCH, LEAD FREE, LGA-52
文件頁數(shù)： 50/72頁
文件大?。?/td> 1919K
代理商： NAND08GW3B2CZL1F
DC and AC parameters
NAND04G-B2D, NAND08G-BxC
Table 29.
DC characteristics (3 V devices)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
IDD1
Operating
current
Sequential
read
tRLRL minimum
E = VIL, IOUT = 0 mA
–15
30
mA
IDD2
Program
–
15
30
mA
IDD3
Erase
–
15
30
mA
IDD4
Standby current (TTL)(1)
E = VIH, WP = 0/VDD
1
mA
IDD5
Standby current (CMOS)(1)
E = VDD-0.2,
WP = 0/VDD
–
10
50
A
ILI
Input leakage current(1)
VIN= 0 to VDDmax
–
±10
A
ILO
Output leakage current(1)
VOUT= 0 to VDDmax
–
±10
A
VIH
Input high voltage
–
0.8 VDD
–
VDD+0.3
V
VIL
Input low voltage
–
-0.3
–
0.2 VDD
V
VOH
Output high voltage level
IOH = -400 A
2.4
–
-
V
VOL
Output low voltage level
IOL = 2.1 mA
–
0.4
V
IOL (RB)
Output Low current (RB)
VOL = 0.4 V
8
–
10
mA
VLKO
VDD supply voltage (erase and
program lockout)
–
1.8
V
1.
leakage current and standby current double in stacked devices.
Table 30.
AC characteristics for command, address, data input
Symbol
Alt.
Parameter
1.8 V
3V
Unit
tALLWH
tALS
Address Latch Low to Write Enable High
AL setup time
Min
25
12
ns
tALHWH
Address Latch High to Write Enable High
tCLHWH
tCLS
Command Latch High to Write Enable High
CL setup time
Min
25
12
ns
tCLLWH
Command Latch Low to Write Enable High
tDVWH
tDS
Data Valid to Write Enable High
Data setup time
Min
20
12
ns
tELWH
tCS
Chip Enable Low to Write Enable High
E setup time
Min
35
20
ns
tWHALH
tALH
Write Enable High to Address Latch High
AL hold time
Min
10
5
ns
tWHCLH
tCLH
Write Enable High to Command Latch High
CL hold time
Min
10
5
ns
tWHCLL
Write Enable High to Command Latch Low
tWHDX
tDH
Write Enable High to Data Transition
Data hold time
Min
10
5
ns
tWHEH
tCH
Write Enable High to Chip Enable High
E hold time
Min
10
5
ns
tWHWL
tWH
Write Enable High to Write Enable Low
W high hold time
Min
15
10
ns
tWLWH
tWP
Write Enable Low to Write Enable High
W pulse width
Min
25
12
ns
tWLWL
tWC
Write Enable Low to Write Enable Low
Write cycle time
Min
45
25
ns
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