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參數(shù)資料
| 型號(hào)： | NAND08GW3B2CZL1F |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 1G X 8 FLASH 3V PROM, 25000 ns, PBGA52 |
| 封裝： | 12 X 17 MM, 1 MM PITCH, LEAD FREE, LGA-52 |
| 文件頁(yè)數(shù)： | 21/72頁(yè) |
| 文件大小： | 1919K |
| 代理商： | NAND08GW3B2CZL1F |
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Device operations
NAND04G-B2D, NAND08G-BxC
6.4
Multiplane page program
The devices support multiplane page program, which enables the programming of two
pages in parallel, one in each plane.
A multiplane page program operation requires the following two steps:
1.
The first step serially loads up to two pages of data (4224 bytes) into the data buffer. It
requires:
–
1 clock cycle to set up the Page Program command (see Section 6.3.1: Sequential
–
5 bus write cycles to input the first page address and data. The address of the first
page must be within the first plane (A18 = 0 for x8 devices, A17 = 0 for x16
devices)
–
1 bus write cycle to issue the page program confirm code. After this, the device is
busy for a time of tIPBSY.
–
When the device returns to the ready state (Ready/Busy High), a multiplane page
program setup code must be issued, followed by the 2nd page address (5 write
cycles) and data. The address of the 2nd page must be within the second plane
(A18 = 1 for x8 devices, A17 = 1 for x16 devices)
2.
Parallel programming of both pages starts after the issue of Page Confirm command.
Refer to Figure 13: Multiplane page program waveform for differences between ONFI
and traditional sequences.
As for standard page program operation, the device supports random data input during both
data loading phases.
Once the multiplane page program operation has started, that is during a delay of tIPBSY, the
status register can be read using the Read Status Register command.
Once the multiplane page program operation has completed, the P/E/R controller bit SR6 is
set to ‘1’ and the Ready/Busy signal goes High.
If the multiplane page program fails, an error is signaled on bit SR0 of the status register. To
know which page of the two planes failed, the Read Status Enhanced command must be
issued twice, once for each plane (see Section 6.12).
Figure 13 provides a description of the multiplane operation while showing the restrictions
related to the multiplane page program and the differences between ONFI 1.0 and
traditional sequences.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NAND128W3A2BV6E | 16M X 8 FLASH 3V PROM, 12000 ns, PDSO48 |
| NAND512R3A2CV6E | 64M X 8 FLASH 1.8V PROM, 15000 ns, PDSO48 |
| NAND128W4A2CZA6E | 8M X 16 FLASH 3V PROM, 35 ns, PBGA55 |
| NAND128R4A2BZA6E | 8M X 16 FLASH 1.8V PROM, 35 ns, PBGA55 |
| NAND256R4A0DN6T | 16M X 16 FLASH 1.8V PROM, 15000 ns, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NAND08GW3B4BN6E | 制造商:Micron Technology Inc 功能描述:NAND - Trays |
| NAND08GW3B4BN6F | 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel |
| NAND08GW3B4CN1F | 制造商:Micron Technology Inc 功能描述:NAND - Trays |
| NAND08GW3B4CZL6E | 制造商:Micron Technology Inc 功能描述:NAND - Trays |
| NAND08GW3C2AE01 | 功能描述:閃存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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