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參數(shù)資料
| 型號： | HYB18T512800AC-5 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | M39012 MIL RF CONNECTOR |
| 中文描述： | 512兆雙數(shù)據(jù)速率2內(nèi)存 |
| 文件頁數(shù)： | 82/96頁 |
| 文件大?。?/td> | 2153K |
| 代理商： | HYB18T512800AC-5 |
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HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Electrical Characteristics & AC Timing - Absolute Specification
Data Sheet
82
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
9) CL = 3
10)CL = 4 & 5
11) For timing definition, slew rate and slew rate derating see
Chapter 8.3
12) For timing definition, slew rate and slew rate derating see
Chapter 8.3
13) The
tHZ
,
t
RPST
and
t
LZ
,
t
RPRE
parameters are referenced to a specific voltage level, which specify when the device output is
no longer driving (
t
HZ
,
t
RPST
), or begins driving (
t
LZ
,
t
RPRE
).
tHZ
and
t
LZ
transitions occur in the same access time windows as
valid data transitions.These parameters are verified by design and characterisation, but not subject to production test.
14) Consists of data pin skew and output pattern effects, and p-channel to n-channel variation of the output drivers as well as
output slew rate mis-match between DQS / DQS and associated DQ in any given cycle.
15) The maximum limit for this parameter is not a device limit. The device operate with a greater value for this parameter, but
system performance (bus turnaround) degrades accordingly.
16)
t
RAS(max)
is calculated from the maximum amount of time a DDR2 device can operate without a Refresh command which is
equal to 9
x
t
REFI.
17) A maximum of eight Auto-Refresh commands can be posted to any given DDR2 SDRAM device.
18) The
t
RCD
timing parameter is valid for both activate command to read or write command with and without Auto-Precharge.
Therefore a separate parameter
t
RAP
for activate command to read or write command with Auto-Precharge is not necessary
anymore.
19)
×
4 &
×
8 (1k page size)
20)
×
16 (2k page size)
21) For each of the terms, if not already an integer, round to the next highest integer.
t
CK
refers to the application clock period.
WR refers to the WR parameter stored in the MRS.
22)
t
WTR
is at least two clocks independent of operation frequency.
23) User can choose two different active power-down modes for additional power saving via MRS address bit A12.
24) The Auto-Refresh command interval has be reduced to 3.9
μ
s when operating the DDR2 DRAM in a temperature range
between 85
o
C and 95
o
C.
25) 0
o
C - 85
o
C
26) 85
o
C - 95
o
C
27) The clock frequency is allowed to change during self-refresh mode or precharge power-down mode. In case of clock
frequency change during power-down, a specific procedure is required as describes in
Chapter 2.12
.
Table 41
Symbol
t
AOND
t
AON
t
AONPD
ODT AC Electrical Characteristics and Operating Conditions (all speed bins)
Parameter / Condition
Min.
ODT turn-on delay
2
ODT turn-on
t
AC(min)
ODT turn-on (Power-Down
Modes)
ODT turn-off delay
2.5
ODT turn-off
t
AC(min)
ODT turn-off (Power-Down
Modes)
ODT to Power Down Mode
Entry Latency
ODT Power Down Exit Latency 8
Max.
2
t
AC(max)
+ 1 ns
2
t
CK
+
t
AC(max)
+ 1 ns
Units
t
CK
ns
ns
Notes
1)
t
AC(min)
+ 2 ns
t
AOFD
t
AOF
t
AOFPD
2.5
t
AC(max)
+ 0.6 ns
2.5
t
CK
+
t
AC(max)
+ 1 ns
t
CK
ns
ns
2)
t
AC(min)
+ 2 ns
t
ANPD
3
—
t
CK
t
AXPD
—
t
CK
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time
max is when the ODT resistance is fully on. Both are measure from
t
AOND
.
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in
high impedance. Both are measured from
t
AOFD
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB18T512800AC | DDR2 Registered Memory Modules |
| HYB18T512800AF | DDR2 Registered Memory Modules |
| HYB18T512800AF-37 | 512-Mbit Double-Data-Rate-Two SDRAM |
| HYB18T512800AF-5 | 512-Mbit Double-Data-Rate-Two SDRAM |
| HYB25D128160CE-5 | 128 Mbit Double Data Rate SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18T512800AF-3S | 制造商:Qimonda 功能描述: 制造商:Infineon Technologies AG 功能描述:32M X 16 DDR DRAM, 0.45 ns, PBGA84 |
| HYB18T512800BF-2.5 | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:60 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| HYB18T512800BF-3.7 | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:150 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁面:1445 (CN2011-ZH PDF) |
| HYB18T512800BF-3S | 功能描述:IC DDR2 SDRAM 512MBIT 60TFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:2,500 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| HYB25D128160AT-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
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