參數(shù)資料
型號(hào): HYB18T512800AC-5
廠商: INFINEON TECHNOLOGIES AG
英文描述: M39012 MIL RF CONNECTOR
中文描述: 512兆雙數(shù)據(jù)速率2內(nèi)存
文件頁(yè)數(shù): 79/96頁(yè)
文件大?。?/td> 2153K
代理商: HYB18T512800AC-5
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
I
DD
Specifications and Conditions
Data Sheet
79
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
6.1
I
DD
Test Conditions
For testing the
I
DD
parameters, the following timing parameters are used:
6.2
On Die Termination (ODT) Current
The ODT function adds additional current consumption
to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a
“week” or “strong” termination can be selected. The
current consumption for any terminated input pin,
depends on the input pin is in tri-state or driving “0” or
“1”, as long a ODT is enabled during a given period of
time.
.
Table 39
ODT Current
Enabled ODT current per DQ
added
I
DDQ
current for ODT enabled;
ODT is HIGH; Data Bus inputs are FLOATING
Active ODT current per DQ
added
I
DDQ
current for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs are
STABLE or SWITCHING.
Note:For power consumption calculations the ODT duty cycle has to be taken into account
Table 38
Parameter
IDD Measurement Test Condition
Symbol
-3.7
-5
Units
Notes
DDR2–533 4–4–4 DDR2–400 3–3–3
4
3.75
15
60
CAS Latency
Clock Cycle Time
Active to Read or Write delay
Active to Active / Auto-Refresh command
period
Active bank A to Active bank B command
delay
CL
min
t
CKmin
t
RCDmin
t
RCmin
3
5
15
55
t
CK
ns
ns
ns
t
RRDmin
7.5
10
45
15
105
7.5
10
40
15
105
ns
ns
ns
ns
ns
1)
1)
×
4 &
×
8 (1 kB page size)
2)
×
16 (2 kB page size)
2)
Active to Precharge Command
Precharge Command Period
Auto-Refresh to Active / Auto-Refresh
command period
t
RASmin
t
RPmin
t
RFCmin
ODT current per terminated input pin:
EMRS(1) State min.
A6 = 0, A2 = 1
A6 = 1, A2 = 0
typ.
6
3
max.
7.5
3.75
Unit
mA/DQ
mA/DQ
I
ODTO
5
2.5
I
ODTT
A6 = 0, A2 = 1
A6 = 1, A2 = 0
10
5
12
6
15
7.5
mA/DQ
mA/DQ
相關(guān)PDF資料
PDF描述
HYB18T512800AC DDR2 Registered Memory Modules
HYB18T512800AF DDR2 Registered Memory Modules
HYB18T512800AF-37 512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512800AF-5 512-Mbit Double-Data-Rate-Two SDRAM
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