
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
AC & DC Operating Conditions
Data Sheet
71
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
5.3
Table 27
Symbol
V
OH
V
OL
V
OTR
Output Buffer
SSTL_18 Output AC Test Conditions
Parameter
Minimum Required Output Pull-up
Maximum Required Output Pull-down
Output Timing Measurement Reference Level
SSTL_18 Class
II
V
TT
+ 0.603
V
TT
– 0.603
0.5
×
V
DDQ
Units
V
V
V
Notes
1)
1) SSTL_18 test load for
V
OH
and
VOL
is different from the referenced load described in
Chapter 8.1
. The SSTL_18 test load
has a 20 Ohm series resistor additionally to the 25 Ohm termination resistor into
V
TT
. The SSTL_18 definition assumes that
±
335 mV must be developed across the effectively 25 Ohm termination resistor (13.4 mA
×
25 Ohm = 335 mV). With an
additional series resistor of 20 Ohm this translates into a minimum requirement of 603 mV swing relative to
V
TT
, at the ouput
device (13.4 mA
×
45 Ohm = 603 mV).
2) The
V
DDQ
of the device under test is referenced
.
1)
2)
Table 28
Symbol
I
OH
I
OL
SSTL_18 Output DC Current Drive
Parameter
Output Minimum Source DC Currentl
Output Minimum Sink DC Current
SSTL_18 Class II
Units
mA
mA
Notes
1)2)3)
–13.4
13.4
1)
V
DDQ
= 1.7 V;
V
OUT
= 1.42 V. (
V
OUT
–
V
DDQ
) /
I
OH
must be less than 21 ohm for values of
V
OUT
between
V
DDQ
and
V
DDQ
–
280 mV.
2) The dc value of
V
REF
applied to the receiving device is set to
V
TT
3) The values of
I
OH(dc)
and
I
OL(dc)
are based on the conditions given in
1)
and
4)
. They are used to test drive current capability
to ensure
V
IHmin
. plus a noise margin and
V
ILmax
minus a noise margin are delivered to an SSTL_18 receiver. The actual
current values are derived by shifting the desired driver operating points along 21 Ohm load line to define a convenient
current for measurement.
4)
V
DDQ
= 1.7 V;
V
OUT
= 280 mV.
V
OUT
/
I
OL
must be less than 21 Ohm for values of
V
OUT
between 0 V and 280 mV.
2)3)4)
Table 29
Symbol
—
—
—
OCD Default Characteristics
Description
Output Impedance
Pull-up / Pull down mismatch
Output Impedance step size
for OCD calibration
Output Slew Rate
Min.
12.6
0
0
Nominal
18
—
—
Max.
23.4
4
1.5
Units
Ohms
Ohms
Ohms
Notes
1)2)
1)
V
DDQ
= 1.8 V
±
0.1 V;
V
DD
= 1.8 V
±
0.1 V
2)
Impedance measurement condition for output source dc current:
V
= 1.7 V,
V
OUT
= 1420 mV;
(
V
–
V
) /
I
must be less than 23.4 ohms for values of
V
between
V
and
DDQ
– 280 mV. Impedance
measurement condition for output sink dc current:
V
= 1.7 V;
V
OUT
= –280 mV;
V
OUT
/
I
OL
must be less than
23.4 Ohms for values of
V
OUT
between 0 V and 280 mV.
3) Mismatch is absolute value between pull-up and pull-down, both are measured at same temperature and
voltage.
4)
This represents the step size when the OCD is near 18 ohms at nominal conditions across all process
parameters and represents only the DRAM uncertainty. A 0 Ohm value (no calibration) can only be achieved
if the OCD impedance is 18
±
0.75 Ohms under nominal conditions.
5)
Slew rates measured from
V
IL(ac)
to
V
IH(ac)
with the load specified in
Chapter 8.2
.
6) The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate as
measured from AC to AC. This is verified by design and characterisation but not subject to production test.
1)2)3)
4)
S
OUT
1.5
—
5.0
V / ns
1)5)6)7)8)