參數(shù)資料
型號(hào): HYB18T512800AC-5
廠商: INFINEON TECHNOLOGIES AG
英文描述: M39012 MIL RF CONNECTOR
中文描述: 512兆雙數(shù)據(jù)速率2內(nèi)存
文件頁(yè)數(shù): 33/96頁(yè)
文件大?。?/td> 2153K
代理商: HYB18T512800AC-5
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Functional Description
Data Sheet
33
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
Figure 13
ODT Timing for Active and Standby (Idle) Modes
Note:
1. Synchronous ODT timings apply for Active Mode
and Standby Mode with CKE “high” and for the
“Fast Exit” Active Power Down Mode (MRS bit A12
set to “0”). In all these modes the on-die DLL is
enabled.
2. ODT turn-on time (
t
AON,min
) is when the device
leaves high impedance and ODT resistance begins
to turn on. ODT turn on time max. (
t
AON max
) is when
the ODT resistance is fully on. Both are measured
from t
A
OND
3. ODT turn off time min. (
t
AOF min
) is when the device
starts to turn off the ODT resistance.ODT turn off
time max. (
t
AOF max
) is when the bus is in high
impedance. Both are measured from
t
AOFD
.
Figure 14
ODT Timing for Precharge Power-Down and Active Power-Down Mode (with slow exit)
(Asynchronous ODT timings)
Note:Asynchronous ODT timings apply for Precharge Power-Down Mode and “Slow Exit” Active Power Down
Mode (MRS bit A12 set to “1”), where the on-die DLL is disabled in this mode of operation.
CKE
DQ
ODT01
ODT
CK, CK
see note 1
Rtt
tAON(min)
tAON(max)
tAOF(max)
tAOF(min)
tAOND (2 tck)
tAOFD (2.5 tCK)
t
IS
t
IS
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
tAOFPD,min
tAOFPD,max
CKE
DQ
ODT
ODT02
CK, CK
"low"
T
0
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
t
IS
t
IS
Rtt
tAONPD,min
tAONPD,max
相關(guān)PDF資料
PDF描述
HYB18T512800AC DDR2 Registered Memory Modules
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HYB18T512800AF-37 512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512800AF-5 512-Mbit Double-Data-Rate-Two SDRAM
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