參數(shù)資料
型號(hào)： HYB18T512800AC-5
廠商： INFINEON TECHNOLOGIES AG
英文描述： M39012 MIL RF CONNECTOR
中文描述： 512兆雙數(shù)據(jù)速率2內(nèi)存
文件頁(yè)數(shù)： 55/96頁(yè)
文件大?。?/td> 2153K
代理商： HYB18T512800AC-5
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Functional Description
Data Sheet
55
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
2.8.2
If A10 is high when a Write Command is issued, the
Write with Auto-Precharge function is engaged. The
DDR2 SDRAM automatically begins precharge
operation after the completion of the write burst plus the
write recovery time delay (
t
WR
), programmed in the
MRS register, as long as
t
RAS
is satisfied. The bank
undergoing Auto-Precharge from the completion of the
write burst may be reactivated if the following two
conditions are satisfied.
Write with Auto-Precharge
1. The last data-in to bank activate delay time (
t
DAL
=
WR +
t
RP
) has been satisfied.
2. The RAS cycle time (
t
RC
) from the previous bank
activation has been satisfied.
In DDR2 SDRAM’s the write recovery time delay (
t
WR
)
has to be programmed into the MRS mode register. As
long as the analog
t
WR
timing parameter is not violated,
WR can be programmed between 2 and 6 clock cycles.
Minimum Write to Activate command spacing to the
same bank = WL + BL/2 +
t
DAL
.
Figure 50
Write with Auto-Precharge Example 1 (
t
RC
Limit): WL = 2,
t
DAL
= 6 (WR = 3,
t
RP
= 3), BL = 4
Figure 51
Write with Auto-Precharge Example 2 (WR +
t
RP
Limit): WL = 4,
t
DAL
= 6 (WR = 3,
t
RP
= 3), BL = 4
NOP
NOP
NOP
NOP
NOP
Bank A
Activate
NOP
W RITE
w/AP
T0
T2
T1
T3
T4
T5
T6
T7
NOP
CMD
DQ
BW-AP223
A10 ="high"
tRP
Auto-Precharge Begins
DIN A0 DIN A1 DIN A2 DIN A3
WL = RL-1 = 2
WR
tRCmin.
>=tRASmin.
DQS,
DQS
Completion of the Burst Write
tDAL
CK, CK
NOP
NOP
NOP
NOP
NOP
Bank A
Activate
NOP
W RITE w/AP
Posted CAS
T0
T3
T4
T5
T6
T7
T12
NOP
CMD
DQ
BW-AP423
A10 ="high"
tRP
Auto-Precharge Begins
DIN A0 DIN A1 DIN A2 DIN A3
WL = RL-1 = 4
WR
>=tRC
T9
T8
Completion of the Burst Write
DQS,
DQS
tDAL
>=tRAS
CK, CK
相關(guān)PDF資料
PDF描述
HYB18T512800AC DDR2 Registered Memory Modules
HYB18T512800AF DDR2 Registered Memory Modules
HYB18T512800AF-37 512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512800AF-5 512-Mbit Double-Data-Rate-Two SDRAM
HYB25D128160CE-5 128 Mbit Double Data Rate SDRAM
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