
Intel
82815EM GMCH
R
8
Datasheet
Figures
Figure 1. Intel
815EM Chipset System Block Diagram...........................................................14
Figure 2. Intel
815EM Chipset GMCH2-M Block Diagram......................................................15
Figure 3. PAM Registers .........................................................................................................58
Figure 4. System Memory Address Map ................................................................................112
Figure 5. Detailed Memory System Address Map..................................................................113
Figure 6. MCH2-M Display Cache Interface to 4MB ..............................................................133
Figure 7. 3D/2D Pipeline Preprocessor..................................................................................135
Figure 8. Data Flow for the 3D Pipeline..................................................................................136
Figure 9. Digital Video Out Port Mobile Application Block Diagram With VCH ......................143
Figure 10. Digital Video Out Port Block Diagram Without VCH .............................................143
Figure 11. GMCH2-M Pinout (Top View-Left Side)................................................................154
Figure 12. GMCH2-M Pinout (Top View-Right Side)..............................................................155
Figure 13. GMCH2-M GMCH BGA Package Dimensions (Top and Side Views)..................160
Figure 14. Intel
815EM Chipset GMCH2-M BGA Package Dimensions (Bottom View).......161
Tables
Table 1. AGP Data Rate and Signaling Levels.........................................................................16
Table 2. Voltage Levels for Each Interface...............................................................................20
Table 3. Display Cache and AGP signal Mapping....................................................................34
Table 4. GMCH2-M PCI Configuration Space (Device #0) ......................................................41
Table 5. Supported System Memory DIMM Configurations.....................................................53
Table 6. Attribute Bit Assignments ...........................................................................................57
Table 7. PAM Registers and Associated Memory Segments...................................................58
Table 8. GMCH2-M Configuration Space (Device #1) .............................................................79
Table 9. Device 2 Configuration Space Address Map (Internal Graphics)...............................96
Table 10. Memory Segments and Their Attributes.................................................................114
Table 11. SMM Space Abbreviations .....................................................................................119
Table 12. Summay of Transactions Supported By GMCH2-M...............................................125
Table 13. Host Responses Supported by the GMCH2-M.......................................................126
Table 14. Special Cycles........................................................................................................127
Table 15. Data Bytes on DIMM Used for Programming DRAM Registers.............................129
Table 16. GMCH2-M DRAM Address Mux Function..............................................................130
Table 17. Programmable SDRAM Timing Parameters ..........................................................131
Table 18. Memory Size for each configuration:......................................................................133
Table 19, GMCH2-M Local Memory Address Mapping..........................................................134
Table 20. Partial List of Display Modes Supported.................................................................141
Table 21. Partial List of Flat Panel Modes Supported ............................................................144
Table 22. Partial List of TV-Out Modes Supported.................................................................144
Table 23. Supported Frequencies and Corresponding Phase Alignments ............................146
Table 24. General Description of ACPI Power States............................................................147
Table 25. State Transition Rules at Platform Level................................................................148
Table 26. Ballout differences between Intel
815 Chipset GMCH and Intel
815EM Chipset
GMCH2-M .......................................................................................................................153
Table 27. Alphabetical Pin Assignment (by Signal Name) .....................................................156