參數(shù)資料
型號(hào): 82815EM
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù): 13/163頁(yè)
文件大小: 1049K
代理商: 82815EM
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Intel
82815EM GMCH
R
Datasheet
13
1.
Overview
The Intel
815EM chipset is a high-flexibility chipset designed to extend from the basic graphics /
multimedia mobile PC platform up to the mainstream performance mobile PC platform. The Intel
815EM chipset consists of a Graphics and Memory Controller Hub (GMCH2-M) Bridge and an I/O
Controller Hub (ICH2-M) Bridge for the I/O subsystem.
The GMCH2-M integrates a Display Cache SDRAM controller that supports a 32-bit 100
MHz
SDRAM
array for enhanced integrated 3D graphics performance. Multiplexed with the display cache interface is
an AGP controller interface to enable graphics configuration and upgrade flexibility with the Intel
815EM chipset. The AGP interface and the internal graphics device are mutually exclusive. When the
AGP port is populated with an AGP graphics device, the integrated graphics is disabled and thus the
display cache interface is not needed.
In this document the terms “GMCH2-M” and “Intel
815EM chipset” refer to the Intel
815EM chipset
Graphics and Memory Controller Hub interchangeably, unless otherwise specified. Also the term GFX
and internal graphics device refers to the Intel
815EM chipset internal graphics device, unless otherwise
specified.
The Intel
815EM chipset may contain design defects or errors known as errata that may cause the
product to deviate from published specifications. Current characterized errata are available on request.
1.1.
The Intel
815EM Chipset System
The Intel
815EM chipset uses a hub architecture with the GMCH2-M as the host bridge hub and the I/O
Controller Hub (ICH2-M) as the I/O hub. The ICH2-M is a highly integrated multifunctional I/O
Controller Hub that provides the interface to the PCI Bus and integrates many of the functions needed in
today’s PC platforms. The Intel
815EM chipset GMCH2-M and ICH2-M communicate over a dedicated
hub interface.
ICH2-M functions and capabilities include:
PCI Rev 2.2 compliant with support for 33 MHz PCI operations
ICH2-M supports up to 6 Req/Gnt pairs (PCI bus)
Power Management Logic Support
Enhanced DMA Controller, Interrupt Controller & Timer Functions
Integrated IDE controller; ICH2-M supports Ultra ATA/66/100
USB host interface with support for four USB ports
System Management Bus (SMBus) compatible with most I2C devices
AC’97 2.1 Compliant Link for Audio and Telephony CODECs
Low Pin Count (LPC) interface
Firmware Hub (FWH) interface support
Alert On LAN*
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