參數(shù)資料
型號： 82815EM
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 31/163頁
文件大?。?/td> 1049K
代理商： 82815EM
Intel
82815EM GMCH
R
Datasheet
31
2.7.
Digital Video Output Signals/TV-Out Pins
Signal Name
Type
Description
LTVCLKIN/STALL
(DVOCLKIN)
I
1.8V
Low Voltage TV Clock In (TV-Out Mode):
In 1.8V TV-Out usage, the
TVCLKIN pin functions as a pixel clock input to the GMCH2-M from the TV
encoder. The TVCLKIN frequency ranges from 20MHz to 40MHz
depending on the mode (e.g., NTSC or PAL) and the overscan
compensation values in the TV Encoder. CLKIN has a worse case duty
cycle of 60%/40% coming in to the GMCH2-M.
Flat Panel Interrupt (LCD Mode):
STALL flow control: This signal comes
from the external VCH chip. This signal is asserted when VCH is not ready
to take in display data from Intel
815EM chipset.
LTVCLKOUT[1:0]
(DVOCLKOUT[1:0])
O
1.8V
LCD/TV Port Clock Out:
These pins provide a differential pair reference
clock that can run up to 85MHz.
LTVBLANK#
(DVOBLANK)
O
1.8V
Flicker Blank or Border Period Indication:
BLANK# is a programmable
output pin driven by the graphics control. When programmed as a blank
period indication, this pin indicates active pixels excluding the border. When
programmed as a border period indication, this pin indicates active pixel
including the border pixels.
LTVDATA[11:0]
(DVODATA[11:0])
O
1.8V
LCD/TV Data:
These signals are used to interface to the LCD/TV-out data
bus.
LTVVSYNC
(DVOVSYNC)
O
1.8V
Vertical Sync:
VSYNC signal for the LTV interface. The active polarity of
the signal is programmable.
LTVHSYNC
(DVOHSYNC)
O
1.8V
Horizontal Sync:
HSYNC signal for the LTV interface. The active polarity
of the signal is programmable.
LTVCK
(DVOI2CCLK)
I/OD
CMOS
LCD/TV Clock:
Clock pin for 2-wire interface.
LTVDA
(DVOI2CDATA)
I/OD
CMOS
LCD/TV Data:
Data pin for 2-wire interface.
INTRPT#
(DVOINT#)
I
CMOS
INTRPT#:
This dedicated pin indicates an interrupt when low. This is used
to support display device hot plug.
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