參數(shù)資料
型號： 82815EM
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 48/163頁
文件大?。?/td> 1049K
代理商： 82815EM
Intel
82815EM GMCH
R
48
Datasheet
3.6.10.
APBASE—Aperture Base Configuration Register (Device 0 -
AGP MODE ONLY)
Address Offset:
10-13h
Default Value (AGP Mode):
00000008h
Default Value (GFX Mode):
00000000h
Access:
Read/Write, Read Only
Size:
32 bits
The APBASE is a standard PCI Base Address register that is used to set the base of the AGP Aperture.
The standard PCI Configuration mechanism defines the base address configuration register such that only
a fixed amount of space can be requested (dependent on which bits are hardwired to “0” or behave as
hardwired to “0”). To allow for flexibility (of the aperture) an additional register called APSIZE is used
as a “back-end” register to control which bits of the APBASE will behave as hardwired to “0”. This
register will be programmed by the GMCH2-M specific BIOS code that will run before any of the
generic configuration software is run.
Note that bit 1 of the APCONT register is used to prevent accesses to the aperture range before this
register is initialized by the configuration software and the appropriate translation table structure has
been established in the main memory.
31
26
25
24
16
Upper Prog. Base Address Bits
Lower
“HW”/Prog
Base
Address
(HW=0)
15
4
3
2
1
0
(HW=0)
Prefetch
able
Type
Mem
Space
Indicator
(HW=0)
Bit
Description
31:26
Upper Programmable Base Address bits (Read/Write).
These bits are used to locate the range size
selected via lower bits 25:4.
Default = 0000
25
Lower “Hardwired”/Programmable Base Address bit.
This bit behaves as a “hardwired” or as a
programmable depending on the contents of the APSIZE register as defined below:
Bit 25 is controlled by the bit 3 of the APSIZE register in the following manner:
If APSIZE[3]=0 then APBASE[25]=0 indicating 64 MB aperture size:
Aperture Size = 64 MB
0 (default)
If APSIZE[3]=1 then APBASE[25] = (Read/Write) allowing 32 MB aperture size:
Aperture Size = 32 MB
Read/Write
Default for APSIZE[3]=0b forces default APBASE[25] = 0b (bit responds as “hardwired” to 0). This
provides a default to the maximum aperture size of 64 MB. The GMCH2-M specific BIOS is responsible
for selecting smaller size (if required) before PCI configuration software runs and establishes the system
address map.
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