參數(shù)資料
型號: L9805
廠商: 意法半導(dǎo)體
元件分類: 基準電壓源/電流源
英文描述: Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述: 超級智能型電動馬達驅(qū)動器,帶有8位微控制器,CAN接口,16K的存儲器,256Bytes RAM內(nèi)存,128字節(jié)EEPROM,10位ADC,水分散粒劑,2定時器,2個PWM模塊,涪陵
文件頁數(shù): 88/103頁
文件大?。?/td> 853K
代理商: L9805
88/103
L9805
INSTRUCTION SET OVERVIEW
(Cont’d)
Indexed (No Offset, Short, Long)
In this mode, the operand is referenced by its
memory address, which is defined by the unsigned
addition of an index register (X or Y) with an offset
which follows the opcode.
The indirect addressing mode consists of three
sub-modes:
Indexed (No Offset)
There is no offset, (no extra byte after the opcode),
and allows 00 - FF addressing space.
Indexed (Short)
The offset is a byte, thus requires only one byte af-
ter the opcode and allows 00 - 1FE addressing
space.
Indexed (long):
The offset is a word, thus allowing 64Kb address-
ing space and requires 2 bytes after the opcode.
Indirect (Short, Long):
The required data byte to do the operation is found
by its memory address, located in memory (point-
er).
The pointer address follows the opcode. The indi-
rect addressing mode consists of two sub-modes:
Indirect (short):
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - FF addressing space, and
requires 1 byte after the opcode.
Indirect (long):
The pointer address is a byte, the pointer size is a
word, thus allowing 64Kb addressing space, and
No Offset, Long and
Short Indexed
Instruction
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
structions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
No Offset and Short
Indexed Instructions
Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC,
RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2’s Complement
Bit Operations
Bit Test and Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
Available Long and Short
Indirect Instructions
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
structions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
Short Indirect
Instructions Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA,
RLC, RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2’s Complement
Bit Operations
Bit Test and Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
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