參數(shù)資料
型號: L9805
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述: 超級智能型電動馬達驅(qū)動器,帶有8位微控制器,CAN接口,16K的存儲器,256Bytes RAM內(nèi)存,128字節(jié)EEPROM,10位ADC,水分散粒劑,2定時器,2個PWM模塊,涪陵
文件頁數(shù): 87/103頁
文件大小: 853K
代理商: L9805
87/103
L9805
INSTRUCTION SET OVERVIEW
(Cont’d)
Inherent:
All Inherent instructions consist of a single byte.
The opcode fully specifies all the required informa-
tion for the CPU to process the operation.
Immediate:
Immediate instructions have two bytes, the first
byte contains the opcode, the second byte con-
tains the operand value..
Direct (Short, Long):
In Direct instructions, the operands are referenced
by their memory address, which follows the op-
code.
The direct addressing mode consists of two sub-
modes:
Direct (short):
The address is a byte, thus requires only one byte
after the opcode, but only allows 00 - FF address-
ing space.
Direct (long):
The address is a word, thus allowing 64Kb ad-
dressing space, but requires 2 bytes after the op-
code.
Inherent Instruction
NOP
TRAP
Function
No operation
S/W Interrupt
Wait For Interrupt (Low Pow-
er Mode)
Halt Oscillator (Lowest Pow-
er Mode)
Sub-routine Return
Interrupt Sub-routine Return
Set Interrupt Mask
Reset Interrupt Mask
Set Carry Flag
Reset Carry Flag
Reset Stack Pointer
Load
Clear
Push/Pop to/from the stack
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Byte Multiplication
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC,
RRC
SWAP
Shift and Rotate Operations
Swap Nibbles
Immediate Instruction
LD
CP
BCP
AND, OR, XOR
ADC, ADD, SUB, SBC
Function
Load
Compare
Bit Compare
Logical Operations
Arithmetic Operations
Available Long and
Short Direct Instructions
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
structions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
Short Direct
Instructions Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC,
RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Test and Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
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