參數(shù)資料
型號: L9805
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述: 超級智能型電動馬達(dá)驅(qū)動器,帶有8位微控制器,CAN接口,16K的存儲器,256Bytes RAM內(nèi)存,128字節(jié)EEPROM,10位ADC,水分散粒劑,2定時器,2個PWM模塊,涪陵
文件頁數(shù): 18/103頁
文件大?。?/td> 853K
代理商: L9805
18/103
L9805
WATCHDOG SYSTEM
(Cont’d)
The Watchdog delay time is defined by bits 5-0 of
the Watchdog register; bit 6 must always be set in
order to avoid generating an immediate reset.
Conversely, this can be used to generate a soft-
ware reset (bit 7 = 1, bit 6 = 0).
The Watchdog must be reloaded before bit 6 is dec-
remented to “0” to avoid a Reset. Following a Re-
set, the Watchdog register will contain 7Fh (bits 0-
7).
If the circuit is not used as a Watchdog (i.e. bit 7 is
never set), bits 6 to 0 may be used as a simple 7-
bit timer, for instance as a real time clock. Since no
reset will be generated under these conditions, the
Watchdog control register must be monitored by
software.
A flag in the watchdog status register indicates if
the last reset is a watchdog reset or not, before
clearing by a write of this register.
3.3.4 Register Description
3.3.4.1 Watchdog Control Register
(WDGCR)
Register Address: 002Ah
Reset Value: 0111 1111 (7Fh)
Read/Write
b7 =
WDGA:
Activation bit.
This bit is set by software and only cleared by
hardware after a reset. When WDGA = 1, the
watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled.
b6-0 =
T6-T0
: 7 bit timer (Msb to Lsb)
These bits contain the decremented value. A reset
is produced when it rolls over from 40h to 3Fh (T6
become cleared).
3.3.4.2 Watchdog Status Register
(WDGSR)
Register Address: 002Bh
Reset Value
(*)
: 0000 0000 (00h)
Read/Write
b7-1 =
not used
b0 =
WDGF:
Watchdog flag. Set by a Watchdog
Reset, cleared by software (writing zero) or Power
On / Low Voltage Reset. This flag is useful for dis-
tinguishing Power On / Low Voltage Reset and
Watchdog Reset.
(*): Except in the case of Watchdog Reset.
7
0
WDGA
T6
T5
T4
T3
T2
T1
T0
7
0
-
-
-
-
-
-
-
WDGF
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