參數(shù)資料
型號(hào): L9805
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述: 超級(jí)智能型電動(dòng)馬達(dá)驅(qū)動(dòng)器,帶有8位微控制器,CAN接口,16K的存儲(chǔ)器,256Bytes RAM內(nèi)存,128字節(jié)EEPROM,10位ADC,水分散粒劑,2定時(shí)器,2個(gè)PWM模塊,涪陵
文件頁數(shù): 16/103頁
文件大?。?/td> 853K
代理商: L9805
16/103
L9805
3.2 OSCILLATOR SAFEGUARD
The L9805 contains an oscillator safe guard func-
tion.
This function provides a real time check of the
crystal oscillator generating a reset condition when
the clock frequency has anomalous value.
If f
OSC
<f
low
, a reset is generated.
If f
OSC
>f
high,
a reset is generated.
A flag in the Dedicated Control Status Register in-
dicates if the last reset is a safeguard reset.
At the output of reset state the safeguard is disa-
ble. To activate the safeguard SFGEN bit must be
set.
Notes:
Following a reset, the safeguard is disa-
bled. Once activated it cannot be disabled, except
by a reset.
3.2.1 Dedicated Control Status Register
DCSR
Address 0022h - Read/Write
Reset Value:xx00 0000 (00h)
b6 =
SGFH:
Safeguard high flag. Set by an Oscil-
lator Safeguard Reset generated for frequency too
high, cleared by software (writing zero) or Power
On / Low Voltage Reset. This flag is useful for dis-
tinguishing Safeguard Reset, Power On / Low
Voltage Reset and Watchdog Reset.
b7 =
SGFL:
Safeguard low flag. Set by an Oscilla-
tor Safeguard Reset generated for frequency too
low, cleared by software (writing zero) or Power
On / Low Voltage Reset. This flag is useful for dis-
tinguishing Safeguard Reset, Power On / Low
Voltage Reset and Watchdog Reset.
b5 =
SFGEN
: Safeguard enable when set. It’s
cleared only by hardware after a reset.
b4 =
CANDS
: CAN Transceiver disable. When this
bit is set the CAN transceiver goes in Power Down
Mode and does not work until this bit is reset.
CANDS is 0 after reset so the standard condition is
with the transceiver enabled. This bit can be used
by application requiring low power consumption
(see
Section 5.7
for details).
b3,b2,b1 =
not used
b0 =
PIEN
: PWMI input enable. When set, the
PWMI input line is connected to Input Capture 2 of
Timer 2. Otherwise, ICAP2_2 is the alternate func-
tion of PA7. See
Figure 31
for the explanation of
this function.
SGFL
SGFH
SFGEN
CANDS
b
3
b
2
b
1
PIEN
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