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參數(shù)資料
| 型號： | L9805 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful |
| 中文描述： | 超級智能型電動馬達(dá)驅(qū)動器，帶有8位微控制器，CAN接口，16K的存儲器，256Bytes RAM內(nèi)存，128字節(jié)EEPROM，10位ADC，水分散粒劑，2定時器，2個PWM模塊，涪陵 |
| 文件頁數(shù)： | 65/103頁 |
| 文件大小： | 853K |
| 代理商： | L9805 |
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L9805
CONTROLLER AREA NETWORK
(Cont’d)
5.6.3.4 Bit Timing Logic
The bit timing logic monitors the serial bus-line and
performs sampling and adjustment of the sample
point by synchronizing on the start-bit edge and re-
synchronization on following edges.
Its operation may be explained simply when the
nominal bit time is divided into three segments as
follows:
–
Synchronisation segment (SYNC_SEG)
: a bit
change is expected to lie within this time seg-
ment. It has a fixed length of one time quanta (1
x t
CAN
).
–
Bit segment 1 (BS1)
: defines the location of the
sample point. It includes the PROP_SEG and
PHASE_SEG1 of the CAN standard. Its duration
is programmable between 1 and 16 time quanta
but may be automatically lengthened to compen-
sate for positive phase drifts due to differences in
the frequency of the various nodes of the net-
work.
–
Bit segment 2 (BS2)
: defines the location of the
transmit point. It represents the PHASE_SEG2
of the CAN standard. Its duration is programma-
ble between 1 and 8 time quanta but may also be
automatically shortened to compensate for neg-
ative phase drifts.
The resynchronization jump width (RJW) defines
an upper bound to the amount of lengthening or
shortening of the bit segments. It is programmable
between 1 and 4 time quanta.
A valid edge is defined as the first transition in a bit
time from dominant to recessive bus level provid-
ed the controller itself does not send a recessive
bit.
If a valid edge is detected in BS1 instead of
SYNC_SEG, BS1 is extended by up to RJW so
that the sample point is delayed.
Conversely, if a valid edge is detected in BS2 in-
stead of SYNC_SEG, BS2 is shortened by up to
RJW so that the transmit point is moved earlier.
As a safeguard against programming errors, the
configuration of the Bit Timing Register (BTR) is
only possible while the device is in STANDBY
mode.
Figure 1. Bit Timing
SYNC_SEG
BIT SEGMENT 1 (BS1)
BIT SEGMENT 2 (BS2)
NOMINAL BIT TIME
1 x t
CAN
t
BS1
t
BS2
SAMPLE POINT
TRANSMIT POINT
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| L9805E | 功能描述:馬達(dá)/運動/點火控制器和驅(qū)動器 Super Smart Power 8-Bit MCU, RAM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Stepper Motor Controllers / Drivers 類型:2 Phase Stepper Motor Driver 工作電源電壓:8 V to 45 V 電源電流:0.5 mA 工作溫度:- 25 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HTSSOP-28 封裝:Tube |
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