參數(shù)資料
型號： L9805
廠商： 意法半導(dǎo)體
元件分類： 基準電壓源/電流源
英文描述： Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述： 超級智能型電動馬達驅(qū)動器，帶有8位微控制器，CAN接口，16K的存儲器，256Bytes RAM內(nèi)存，128字節(jié)EEPROM，10位ADC，水分散粒劑，2定時器，2個PWM模塊，涪陵
文件頁數(shù)： 10/103頁
文件大小： 853K
代理商： L9805
10/103
L9805
0031h
0032h
0033h
0034h-0035h
0036h-0037h
0038h-0039h
003Ah-003Bh
003Ch-003Dh
003Eh-003Fh
TIM1
T1CR2
..
T1CR1
..
T1SR
..
T1IC1HR
..
T1IC1LR
..
T1OC1HR
..
T1OC1LR
..
T1CHR
..
T1CLR
..
T1ACHR
..
T1ACLR
..
T1IC2HR
..
T1IC2LR
..
T1OC2HR
..
T1OC2LR
..
Timer 1 Control Register2
Timer 1 Control Register1
Timer 1 Status Register
Timer 1 Input Capture1 High Register
Timer 1 Input Capture1 Low Register
Timer 1 Output Compare1 High Register
Timer 1 Output Compare1 Low Register
Timer 1 Counter High Register
Timer 1 Counter Low Register
Timer 1 Alternate Counter High Register
Timer 1 Alternate Counter Low RegisteR
Timer 1 Input Capture2 High Register
Timer 1 Input Capture2 Low Register
Timer 1 Output Compare2 High Register
Timer 1 Output Compare2 Low Register
Reserved: Write Forbidden
Timer 2 Control Register2
Timer 2 Control Register1
Timer 2 Status Register
Timer 2 Input Capture1 High Register
Timer 2 Input Capture1 Low Register
Timer 2 Output Compare1 High Register
Timer 2 Output Compare1 Low Register
Timer 2 Counter High Register
Timer 2 Counter Low Register
Timer 2 Alternate Counter High Register
Timer 2 Alternate Counter Low Register
Timer 2 Input Capture2 High Register
Timer 2 Input Capture2 Low Register
Timer 2 Output Compare2 High Register
Timer 2 Output Compare2 Low Register
00h
00h
xxh
xxh
xxh
xxh
xxh
FFh
FCh
FFh
FCh
xxh
xxh
xxh
xxh
R/W
R/W
Read Only
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
0040h
0041h
0042h
0043h
0044h-0045h
0046h-0047h
0048h-0049h
004Ah-004Bh
004Ch-004Dh
004Eh-004Fh
TIM2
T2CR2
..
T2CR1
..
T2SR
..
T2IC1HR
..
T2IC1LR
..
T2OC1HR
..
T2OC1LR
..
T2CHR
..
T2CLR
..
T2ACHR
..
T2ACLR
..
T2IC2HR
..
T2IC2LR
..
T2OC2HR
..
T2OC2LR
..
00h
00h
xxh
xxh
xxh
xxh
xxh
FFh
FCh
00h
00h
xxh
xxh
xxh
xxh
R/W
R/W
Read Only
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
0050h to
0059h
005Ah
005Bh
005Ch
005Dh
005Eh
005Fh
0060h to
006Fh
RESERVED
CAN
CANISR
..
CANICR
..
CANCSR
..
CANBRPR
..
CANBTR
..
CANPSR
..
CAN Interrupt Status Register
CAN Interrupt Control Register
CAN Control/Status Register
CAN Baud Rate Prescaler
CAN Bit Timing Register
CAN Page Selection
CAN First address to
last address of PAGE X
00h
00h
00h
00h
23h
00h
--
R/W
R/W
R/W
R/W
R/W
R/W
see page map-
ping and regis-
ter description
Read Only
Read Only
R/W
0070h
0071h
0072h
ADC
ADCDRH
..
ADCDRL
..
ADCCSR
..
ADC Data Register High
ADC Data Register Low
ADC Control/Status Register
00h
00h
20h
Address
Block
Register La-
bel
Register name
Reset
Status
Remarks
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