參數(shù)資料
型號(hào): L9805
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
中文描述: 超級(jí)智能型電動(dòng)馬達(dá)驅(qū)動(dòng)器,帶有8位微控制器,CAN接口,16K的存儲(chǔ)器,256Bytes RAM內(nèi)存,128字節(jié)EEPROM,10位ADC,水分散粒劑,2定時(shí)器,2個(gè)PWM模塊,涪陵
文件頁(yè)數(shù): 64/103頁(yè)
文件大?。?/td> 853K
代理商: L9805
64/103
L9805
ERROR
. The error management as described in
the CAN protocol is completely handled by hard-
ed or decremented according to the error
condition. Both of them may be read by the appli-
cation to determine the stability of the network.
Moreover, as one of the node status bits (EPSV
or BOFF of the CSR register) changes, an inter-
rupt is generated if the SCIE bit is set in the ICR
Register. Refer to
Figure 37
.
Figure 37. CAN Error State Diagram
ERROR PASSIVE
When TECR or RECR > 127, the EPSV bit gets set
When TECR and RECR < 128,
the EPSV bit gets cleared
and the EPSV bit gets cleared
ERROR ACTIVE
BUS OFF
When TECR > 255 the BOFF bit gets set
When 128 * 11 recessive bits occur:
- the BOFF bit gets cleared
- the TECR register gets cleared
- the RECR register gets cleared
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