參數(shù)資料
型號： DS3112RD
廠商： Maxim Integrated Products, Inc.
英文描述： RECT BRIDGE GPP 15A 800V GBJ
中文描述： DS3/E3多路復(fù)用器參考設(shè)計
文件頁數(shù)： 70/135頁
文件大?。?/td> 585K
代理商： DS3112RD
DS3112
70 of 135
6.4 T1/E1 AIS Generation Control Register Description
Via the T1/E1 Alarm Indication Signal (AIS) Control Registers, the host can configure the DS3112 to
generate an unframed all ones signal in either the transmit or receive paths on the 28 T1 ports or the 16/21
E1 ports. On reset, the device will force AIS in both the transmit and receive paths and it is up to the host
to modify the T1/E1 AIS Generation Control Registers to allow normal T1/E1 traffic to traverse the
DS3112. See the block diagrams in Section 1 for details on where the AIS signal is injected into the data
flow. When the M13/E13 multiplexer function is disabled in the DS3112 (see the UNCHEN control bit
in the Master Control Register 1 in Section 4.2 for details), the T1/E1 AIS Generation Control Registers
are meaningless and can be set to any value.
Register Name:
T1E1RAIS1
Register Description:
T1/E1 Receive Path AIS Generation Control Register 1
Register Address:
40h
Bit #
7
6
5
4
Name
AIS8
AIS7
AIS6
AIS5
Default
0
0
0
0
Bit #
15
14
13
12
Name
AIS16
AIS15
AIS14
AIS13
Default
0
0
0
0
Note
:
Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15/Receive AIS Generation Control for T1/E1 Ports 1 to 16 (AIS1 to AIS2).
These bits
determine whether the device will replace the demultiplexed T1/E1 data stream with an unframed all ones
AIS signal. AIS1 controls the data at LRDAT1, AIS2 controls the data at LRDAT2, and so on. Since
ports 4, 8, 12, 16, 20, 24, and 28 are not active in the G.747 mode, the AIS4, AIS8, AIS12, and AIS16
bits have no affect in the G.747 mode.
0 = send AIS to the LRDAT output
1 = send normal data to the LRDAT output
Register Name:
T1E1RAIS2
Register Description:
T1/E1 Receive Path AIS Generation Control Register 2
Register Address:
42h
Bit #
7
6
5
4
Name
AIS24
AIS23
AIS22
AIS21
Default
0
0
0
0
Bit #
15
14
13
12
Name
n/a
n/a
n/a
n/a
Default
-
-
-
-
Note:
Bits that are underlined are read-only; all other bits are read-write.
3
2
1
0
AIS4
0
AIS3
0
AIS2
0
AIS1
0
11
10
9
8
AIS12
0
AIS11
0
AIS10
0
AIS9
0
3
2
1
0
AIS20
0
AIS19
0
AIS18
0
AIS17
0
11
10
9
8
AIS28
0
AIS27
0
AIS26
0
AIS25
0
相關(guān)PDF資料
PDF描述
DS3134 Chateau Channelized T1 And E1 And HDLC Controller
DS3160 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
DS3171 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3171N Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3172 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3116MP000 制造商:Thomas & Betts 功能描述:MAXGARD - RR8F
DS311X 功能描述:KWIK-CHG DESIGNATION STRIPS DBL RoHS:是 類別:盒，外殼，支架 >> 插線臺，插座面板 - 配件 系列:Kwik-Change® 標(biāo)準包裝:50 系列:- 附件類型:模擬插頭，雙 樣式:耳機，0.173" 直徑 包括:-
DS312 功能描述:插線板 DESIGN STRIP COVER RoHS:否 制造商:Switchcraft 產(chǎn)品類型:Bantam (TT) 正規(guī)化: 高度/機架數(shù)量: 深度: 端接類型: 位置/觸點數(shù)量:48
DS-312 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Four-Way Power Divider, 10 - 500 MHz
DS312_09 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3E FPGA Family: Introduction and Ordering Information
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*