參數(shù)資料
型號: DS3112RD
廠商: Maxim Integrated Products, Inc.
英文描述: RECT BRIDGE GPP 15A 800V GBJ
中文描述: DS3/E3多路復用器參考設計
文件頁數(shù): 103/135頁
文件大?。?/td> 585K
代理商: DS3112RD
DS3112
103 of 135
11. JTAG
11.1 JTAG Description
The DS3112 device supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGH-Z, CLAMP, IDCODE (Figure 11.1A). The
DS3112 contains the following items that meet the requirements set by the IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture:
§
Test Access Port (TAP)
§
TAP Controller
§
Instruction Register
§
Bypass Register
§
Boundary Scan Register
§
Device Identification Register
The Test Access Port has the necessary interface pins, namely JTCLK, JTRST*, JTDI, JTDO, and JTMS.
Details on these pins can be found in Section 2.9. Details on the Boundary Scan Architecture and the Test
Access Port can be found in IEEE 1149.1-1990, IEEE 1149.1a-1993, and IEEE 1149.1b-1994.
JTAG BLOCK DIAGRAM
Figure 11.1A
Boundary Scan
Register
Identification
Register
Bypass
Register
Instruction
Register
Test Access Port
Controller
Mux
Select
Tri-State
JTDI
10K
JTMS
10K
JTCLK
JTRST*
10K
JTDO
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