參數(shù)資料
型號: DS3112RD
廠商: Maxim Integrated Products, Inc.
英文描述: RECT BRIDGE GPP 15A 800V GBJ
中文描述: DS3/E3多路復(fù)用器參考設(shè)計
文件頁數(shù): 47/135頁
文件大?。?/td> 585K
代理商: DS3112RD
DS3112
47 of 135
5. T3/E3 FRAMER
5.1 General Description
On the receive side, the T3/E3 framer locates the frame boundaries of the incoming T3 or E3 data stream
and monitors the data stream for alarms and errors. Alarms are detected and reported in T3/E3 Status
Register (T3E3SR) and the T3/E3 Information Register (T3E3INFO), which are described in Section 5.3.
Errors are accumulated in a set of error counters (Section 5.4). The host can force the T3/E3 framer to
resynchronize via the T3E3RSY control bit in the MRID register (Section 4.1). On the transmit side, the
device formats the outgoing data stream with the proper framing pattern and overhead and can generate
alarms. It can also inject errors for diagnostic testing purposes (T3E3EIC register). The transmit side of
the framer is called the “formatter.”
The T3/E3 framer and formatter can be used in conjunction with the multiplexer or as a standalone
framer. This selection is made in the Master Configuration 1 (MC1) register (Section 4.2).
T3/E3 Line Loopback
The line loopback loops the incoming T3/E3 data (the HRCLK, HRPOS, and HRNEG inputs) directly
back to the transmit side (the HTCLK, HTPOS, and HTNEG outputs). When this loopback is enabled, the
incoming receive data continues to pass through the device but the data output from the T3/E3 formatter
is replaced with the data being input to the device. See the block diagrams in Section 1 for a visual
description of this loopback.
T3/E3 Diagnostic Loopback
The diagnostic loopback loops the outgoing T3/E3 data from the T3/E3 formatter back to receive side
framer. When this loopback is enabled, the incoming receive data at HRCLK, HRPOS, and HRNEG is
ignored. See the block diagrams in Section 1 for a visual description of this loopback. Please note that the
device can still generate AIS at the HTCLK, HTPOS, and HTNEG outputs when this loopback is
invoked. This is important to keep the data that is being looped back from disturbing downstream
equipment.
T3/E3 Payload Loopback
The payload loopback loops the framed T3/E3 data from the receive side framer back to the transmit side
formatter. When this loopback is enabled, the incoming receive data continues to pass through the device
but the data normally being input to the T3/E3 formatter is ignored. See the block diagrams in Section 1
for a visual description of this loopback.
相關(guān)PDF資料
PDF描述
DS3134 Chateau Channelized T1 And E1 And HDLC Controller
DS3160 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
DS3171 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3171N Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3172 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3116MP000 制造商:Thomas & Betts 功能描述:MAXGARD - RR8F
DS311X 功能描述:KWIK-CHG DESIGNATION STRIPS DBL RoHS:是 類別:盒,外殼,支架 >> 插線臺,插座面板 - 配件 系列:Kwik-Change® 標(biāo)準(zhǔn)包裝:50 系列:- 附件類型:模擬插頭,雙 樣式:耳機(jī),0.173" 直徑 包括:-
DS312 功能描述:插線板 DESIGN STRIP COVER RoHS:否 制造商:Switchcraft 產(chǎn)品類型:Bantam (TT) 正規(guī)化: 高度/機(jī)架數(shù)量: 深度: 端接類型: 位置/觸點(diǎn)數(shù)量:48
DS-312 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Four-Way Power Divider, 10 - 500 MHz
DS312_09 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3E FPGA Family: Introduction and Ordering Information