• <dfn id="e0ox2"><big id="e0ox2"></big></dfn>
    <thead id="e0ox2"></thead>
    • <li id="e0ox2"><tr id="e0ox2"><sup id="e0ox2"></sup></tr></li>
    <menuitem id="e0ox2"><tbody id="e0ox2"><optgroup id="e0ox2"></optgroup></tbody></menuitem>
    <form id="e0ox2"><center id="e0ox2"><s id="e0ox2"></s></center></form>
            


    
    



    

    
  
    
    
    
    
  
    
  
  

    





    


    
 
 




 
 


    

    
    


    參數(shù)資料
    

    


    


    
型號(hào)：
PI7C7300DNAE

    

    
廠商：
Pericom

    

    
文件頁(yè)數(shù)：
96/107頁(yè)

    

    
文件大?。?/td>
0K

    

    
描述：
IC PCI-PCI BRIDGE 3PORT 272-BGA

    

    
標(biāo)準(zhǔn)包裝：
40

    

    
系列：
*

    

    
應(yīng)用：
*
    		

    

    
接口：
*
    		

    

    
電源電壓：
*
    		

    

    
封裝/外殼：
272-BBGA
    		

    

    
供應(yīng)商設(shè)備封裝：
272-PBGA（27x27）
    		

    

    
包裝：
管件
    		

    

    
安裝類(lèi)型：
表面貼裝
    		

    

    

    

	
    
    
    

    
    
	
    PI7C7300D
    3-PORT PCI-TO-PCI BRIDGE
    Page 89 of 107
    Pericom Semiconductor
    November 2005 - Revision 1.01
    Bit
    Function
    Type
    Description
    6
    Delayed Read –
    No Data From
    Target
    R/W
    Controls PI7C7300D’s ability to assert P_SERR# when it is unable to
    transfer any read data from the target after 2
    24 attempts.
    0: P_SERR# is asserted if this event occurs and the SERR# enable bit
    in the command register is set
    1: P_SERR# is not asserted if this event occurs
    Reset to 0
    7
    Reserved
    R/O
    Reserved. Returns 0 when read. Reset to 0
    14.1.36
    SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h
    Configuration Register 1
    Bit
    Function
    Type
    Description
    1:0
    Clock 0 disable
    R/W
    If either bit is 0, then S1_CLKOUT [0] is enabled.
    If both bits are 1, the S1_CLKOUT [0] is disabled.
    3:2
    Clock 1 disable
    R/W
    If either bit is 0, then S1_CLKOUT [1] is enabled.
    If both bits are 1, the S1_CLKOUT [1] is disabled.
    5:4
    Clock 2 disable
    R/W
    If either bit is 0, then S1_CLKOUT [2] is enabled.
    If both bits are 1, the S1_CLKOUT [2] is disabled.
    7:6
    Clock 3 disable
    R/W
    If either bit is 0, then S1_CLKOUT [3] is enabled.
    If both bits are 1, the S1_CLKOUT [3] is disabled.
    9:8
    Clock 4 disable
    R/W
    If either bit is 0, then S1_CLKOUT [4] is enabled.
    If both bits are 1, the S1_CLKOUT [4] is disabled.
    11:10
    Clock 5 disable
    R/W
    If either bit is 0, then S1_CLKOUT [5] is enabled.
    If both bits are 1, the S1_CLKOUT [5] is disabled.
    13:12
    Clock 6 disable
    R/W
    If either bit is 0, then S1_CLKOUT [6] is enabled.
    If both bits are 1, the S1_CLKOUT [6] is disabled.
    15:14
    Clock 7 disable
    R/W
    If either bit is 0, then S1_CLKOUT [7] is enabled.
    If both bits are 1, the S1_CLKOUT [7] is disabled.
    Configuration Register 2
    Bit
    Function
    Type
    Description
    1:0
    Clock 0 disable
    R/W
    If either bit is 0, then S2_CLKOUT [0] is enabled.
    If both bits are 1, the S2_CLKOUT [0] is disabled.
    3:2
    Clock 1 disable
    R/W
    If either bit is 0, then S2_CLKOUT [1] is enabled.
    If both bits are 1, the S2_CLKOUT [1] is disabled.
    5:4
    Clock 2 disable
    R/W
    If either bit is 0, then S2_CLKOUT [2] is enabled.
    If both bits are 1, the S2_CLKOUT [2] is disabled.
    7:6
    Clock 3 disable
    R/W
    If either bit is 0, then S2_CLKOUT [3] is enabled.
    If both bits are 1, the S2_CLKOUT [3] is disabled.
    9:8
    Clock 4 disable
    R/W
    If either bit is 0, then S2_CLKOUT [4] is enabled.
    If both bits are 1, the S2_CLKOUT [4] is disabled.
    11:10
    Clock 5 disable
    R/W
    If either bit is 0, then S2_CLKOUT [5] is enabled.
    If both bits are 1, the S2_CLKOUT [5] is disabled.
    13:12
    Clock 6 disable
    R/W
    If either bit is 0, then S2_CLKOUT [6] is enabled.
    If both bits are 1, the S2_CLKOUT [6] is disabled.
    15:14
    Clock 7 disable
    R/W
    If either bit is 0, then S2_CLKOUT [7] is enabled.
    If both bits are 1, the S2_CLKOUT [7] is disabled.
    14.1.37
    PORT OPTION REGISTER – OFFSET 74h
    Bit
    Function
    Type
    Description
    0
    Reserved
    R/O
    Reserved. Returns 0 when read. Reset to 0.
    
    
    
    
    
    


    


    

    相關(guān)PDF資料
    		

    PDF描述
    		

    
    

    
PI7C8140AMAE
IC PCI-PCI BRIDGE 2PORT 128-QFP

    

    
PI7C8150ANDE
IC PCI-PCI BRIDGE 2PORT 256-PBGA

    

    
PI7C8150BNDIE
IC PCI-PCI BRIDGE ASYNC 256-PBGA

    

    
PI7C8152BMAIE
IC PCI-PCI BRIDGE 2PORT 160-MQFP

    

    
PI7C8154ANAE
IC PCI-PCI BRIDGE ASYNC 304-PBGA

    

    

    

    


    


    

    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
PI7C7300EVB
功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V

    

    
PI7C8140A
 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON

    

    
PI7C8140AEVB
功能描述:界面開(kāi)發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V

    

    
PI7C8140AMA
 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge

    

    
PI7C8140AMAE
功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray

    

    
    
    
    
	
    	
    
    
     
     
    發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。
    
 
     
    

   	  
    
     

    
                    			    				      
    
                
    
                  
    
                    
                    
    
                      
    
                      
                      
    采購(gòu)需求
      (若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)
    
                      
                      
    發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)
    
                      
                      
    發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)
    
                       
                        
    
                                
                                
    
                                    *型號(hào)
                                    *數(shù)量
                                    廠商
                                    批號(hào)
                                    封裝
                                  
    
                                    
                                
                                
    
                                    
                                        
    
                                            
                                            
                                        
    
                                        		
                                     
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                  
    
                                  
                                   
                                    
                            
    
                             
                             
							                            
    
                          添加更多采購(gòu)
    
                      
    
                      
                      
    
                      
                      
    我的聯(lián)系方式
    
                     
                     
                       
    
                                
                                
                                
    
                                    
                                         *
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                         *
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                        
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                         *