參數(shù)資料
型號(hào)： PI7C7300DNAE
廠(chǎng)商： Pericom
文件頁(yè)數(shù)： 11/107頁(yè)
文件大小： 0K
描述： IC PCI-PCI BRIDGE 3PORT 272-BGA
標(biāo)準(zhǔn)包裝： 40
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 272-BBGA
供應(yīng)商設(shè)備封裝： 272-PBGA（27x27）
包裝： 管件
安裝類(lèi)型： 表面貼裝
PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
1
INTRODUCTION
PRODUCT DESCRIPTION
The PI7C7300D is Pericom Semiconductor’s second-generation PCI-PCI Bridge and is
an updated revision to the PI7C7300A. It is designed to be fully compliant with the 32-
bit, 66MHz implementation of the PCI Local Bus Specification, Revision 2.2. The
PI7C7300D supports only synchronous bus transactions between devices on the Primary
Bus running at 33MHz to 66MHz and the Secondary Buses operating at either 33MHz or
66MHz. The Primary and Secondary Buses can also operate in concurrent mode,
resulting in added increase in system performance. Concurrent bus operation off-loads
and isolates unnecessary traffic from the Primary Bus; thereby enabling a master and a
target device on the same Secondary PCI Bus to communicate even while the Primary
Bus is busy. In addition, the Secondary Buses have load balancing capability, allowing
faster devices to be isolated away from slower devices. Among the other features
supported by the PI7C7300D are: support for up to 15 devices on the Secondary Buses,
Compact PCI Hot Swap (PICMG 2.1, R1.0) Friendly Support and Dual Addressing
Cycle.
PRODUCT FEATURES
32-bit Primary and Two Secondary Ports run up to 66MHz
All 3 ports compliant with the PCI Local Bus Specification, Revision 2.2
Compliant with PCI-to-PCI Bridge Architecture Specification, Revision 1.1.
-
All I/O and memory commands
-
Type 1 to Type 0 configuration conversion
-
Type 1 to Type 1 configuration forwarding
-
Type 1 configuration write to special cycle conversion
Concurrent Primary to Secondary Bus operation and independent intra-Secondary
Port channel to reduce traffic on the Primary Port
Provides internal arbitration for one set of eight secondary bus masters (S1 bus) and
one set of seven (eight if Hot Swap is disabled) secondary bus masters (S2 bus)
-
Programmable 2-level priority arbiter
-
Disable control for use of external arbiter
Supports posted write buffers in all directions
Three 128 byte FIFO’s for delay transactions
Three 128 byte FIFO’s for posted memory transactions
Enhanced address decoding
-
32-bit I/O address range
-
32-bit memory-mapped I/O address range
-
VGA addressing and VGA palette snooping
-
ISA-aware mode for legacy support in the first 64KB of I/O address range
Dual Addressing cycle (64-bit)
Supports system transaction ordering rules
Tri-state control of output buffers on secondary buses
Compact PCI Hot Swap (PICMG 2.1, R1.0) Friendly Support
Industrial Temperature range –40°C to 85°C
IEEE 1149.1 JTAG interface support
3.3V core; 3.3V PCI I/O interface with 5V I/O tolerance
272-pin plastic BGA package
Page 11 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
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參數(shù)描述
PI7C7300EVB 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V
PI7C8140A 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON
PI7C8140AEVB 功能描述:界面開(kāi)發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V
PI7C8140AMA 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge
PI7C8140AMAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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