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| 型號： | IBM32NPR101EPXCAC133 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 97/131頁 |
| 文件大小： | 1679K |
| 代理商： | IBM32NPR101EPXCAC133 |
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PRS28.4G
IBM Packet Routing Switch
prs28.03.fm
August 31, 2000
I/O Definitions and Timing
Page 97 of 131
EMB_DATA_OUT
Output
Serial data line that shifts out of the OCM either the command respond or the scan
string data, according to EMB_MODE and based on the EMB clock.
The EMB_DATA_OUT is placed in high-impedance state when the OCM is not in shift
state. The OCM is in shift state one EMB clock cycle after EMB_SELECT = ‘0'b.
EMB_MODE
Input
Used to define the operation type of the OCM when EMB_SELECT is asserted:
0’b:
Instruction / Status operation
1’b:
Scan operation
This signal must be stable one EMB clock cycle before the start of data transmission
and has to be stable for the duration of the transfer.
nEMB_SELECT
Input
active low
Enables the OCM operation specified by EMB_MODE. One EMB clock cycle after the
EMB_SELECT signal becomes active, instruction or scan data is serially shifted into
the OCM via EMB_DATA_IN, and the response or scan data is shifted out of the OCM
on the EMB_DATA_OUT. If EMB_MODE is ‘0'b, one EMB clock cycle after the
EMB_SELECT is deactivated, the instruction in the OCM register is decoded and exe-
cuted.
When EMB_MODE is ‘0’b, the nEMB_SELECT must be deactivated for at least six
internal byte cycles (60 ns) between consecutive shift operations.
In a ring configuration, all OCMs can be simultaneously enabled for data transfer with
a common EMB_SELECT line.
In order to ensure proper initialization during power-on-reset, the EMB_SELECT sig-
nal must be held low.
EMB_MODEnEMB_SELECTOperationDescription
0 0
InstructionInstruction applied to EMB_DATA_IN is shifted into the
OCM instruction register. At the
same time, the content of the
response register is shifted out
on the EMB_DATA_OUT line.
0 1
1 0
InstructionInstruction in OCM instruction register is executed.
OCM ScanSerial scan data applied to EMB_DATA_IN is shifted into
the device SRL strings. At the
same time, the SRL scan string
data is shifted out on the
EMB_DATA_OUT line.
1 1
OCM ScanNo operation occurs
Debug Bus Signals
DBG_SELECT(0:7)
Input
Enables the external debug bus and select the set of signals presented on the
DBG_DATA bus.
Bit PositionBus SelectDescription
0-2
000
Debug bus not used - DBG_DATA bus is tri-stated.
001
Sequencer debug bus selected
010
Address Manager debug bus selected
011
Clock Logic debug bus selected
100
Input Controller debug bus selected - Port Number has to be speci-
fied via DBG_SELECT(3 to 6).
101
M3 Debug 1 bus selected
110
M3 Debug 2 bus selected
111
Stored Memory bus selected
3-6
Port Number:
specifies the port number of the Input Controller,
when the Input Controller Debug Bus is selected.
DBG_DATA(0:15)
Output
Provides direct I/O access (logic analyzer) to the Debug Bus specified by the
DBG_SELECT bus. See
DBG_DATA Bus Definitions
on page 100.
IEEE 1149.1 (JTAG) Interface Signals
Table 21: Signal Definitions
(Page 4 of 6)
Signal Name
Type
Description
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