- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄360706 > IBM32NPR101EPXCAC133 Microprocessor PDF資料下載
參數(shù)資料
| 型號(hào)： | IBM32NPR101EPXCAC133 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁(yè)數(shù)： | 79/131頁(yè) |
| 文件大小： | 1679K |
| 代理商： | IBM32NPR101EPXCAC133 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)當(dāng)前第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)
PRS28.4G
IBM Packet Routing Switch
prs28.03.fm
August 31, 2000
Internal Registers
Page 79 of 131
5.2.23 Command Register
This register allows the software to initiate specific actions. Only one command can be set at a time. All
commands are interpreted as pulses, that is a command is only executed when the register is written to. This
register does not have to be cleared after the command has been executed.
Reserved
P
P
A
C
M
M
T
L
F
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Reset Value
0
OCM Address
17‘x’
Access Type
Read/Write
Bits
Description
0 - 6
Reserved
.
7
Processor Write
. Triggers a write command of the data in the Processor Data register to the Pico-Processor
address specified in the Processor Address register.
8
Processor Read
. Triggers a read command to the Pico-Processor address specified in the Processor Address
register. The result is returned in the Processor Data register.
9
ABIST Start
. Starts the ABIST process, which checks all RAMs. When the ABIST is running, the ABIST Active
bit of the Status register is active. And upon completion, the ABIST Pass/Fail status is reported in the Miscella-
neous Status Register. Note that the ABIST can only be run while the device is in Standby mode.
This command can only be triggered in Standby mode after Power-on Reset or Flush Reset.
10
Color Clear
. Clears the Idle Packet color state machine. After this command is initiated, Idle Packets of the
same color as the Expected Color are transmitted on a given output port when both following conditions are
satisfied: at least one packet of the expected color is received on all inputs, and the corresponding output
queue is empty. As long as these two conditions are not met, Idle Packets are transmitted with the opposite
color to the expected color.
11
Memory Row Write
. Triggers the writing of the Memory Row Data register to the shared memory row location
specified by the Memory Row Address register.
12
Memory Row Read
. Triggers the reading of the shared memory row location specified by the Memory Row
Address register and the loading of the data into the Memory Row Data register.
13
Transmit Control Packet
. Triggers the transmission of the Control Packet, located in shared memory address
0 (and 1 if not in internal and external speed expansion), on all the ports specified in the Control Packet Desti-
nation register. The Control Packet Transmitted interrupt is generated once the packet has been transmitted by
all the specified ports.
14
Load Next Control Packet Address
. Loads the address at the top of the control packet queue into the Mem-
ory Row Address Register. Note that the read address stays at the top of the control packet queue.
15
Free Control Packet Address
. Frees the address at the top of the control packet queue. The following
address moves to the top.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM37RGB524CF17A | Video DAC with Color Palette (RAMDAC) |
| IBM37RGB524CF22A | Video DAC with Color Palette (RAMDAC) |
| IBM39MPEGS420PBA18C | |
| IBM39MPEGS422PBA17C | |
| IBM39MPEGSIPBA18C | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM35CPC945C03C-2 | 制造商:IBM 功能描述: |
| IBM37RGB524CF17A | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| IBM37RGB524CF22A | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| IBM39ENV422DLL00C | 制造商:IBM 功能描述: |
| IBM39ENV422PBA17C | 制造商:IBM Microelectronics 功能描述:VID ENCODER 420PIN HPBGA - Trays 制造商:IBM 功能描述:IBM IBM39ENV422PBA17C Encoders - Decoders |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。