參數(shù)資料
型號: IBM32NPR101EPXCAC133
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 124/131頁
文件大?。?/td> 1679K
代理商: IBM32NPR101EPXCAC133
PRS28.4G
IBM Packet Routing Switch
DASL Specification and Pico-Processor
Page 124 of 131
prs28.03.fm
August 31, 2000
9. DASL Specification and Pico-Processor
The DASL interface is composed of four 444 Mb/s HSTL differential pairs, compliant with EIA/JEDEC JESD8-
6 standard.
The data synchronization (bit-phase alignment and packet alignment) is performed by an internal pico-
processor (M3) which acts as a shared controller for all DASL interfaces. This synchronization is performed
when transmitting Sync packets and placing the shared controller in a Hunt state via the Sync Hunt register
(see DASL Initialization and Operation section).
The DASL synchronization algorithm allows for temperature tracking and dynamic phase alignment. This
algorithm will operate without lost of data in the following temperature range:
The operation of the shared controller requires first the programming of the -processor instruction memory.
The instruction code is provided along with the PRS28.4G module.
Access to the instruction memory is provided via the Processor Address and Data registers, and the
Processor Commands in the Command register (see Application Registers section). The table below shows
the range addresses of the instruction memory in the pico-processor address space.
Loading of the instruction memory has to start at the lowest address, 0x’800’, and the instructions have to be
continuous in the address space. Note that the Processor Address only has to be set once, since its value will
auto-increment after every memory access.
Finally, access to the instruction memory (read or write) has to be performed by first activating the M3_Reset
bit in the Mode register and keeping it active until all memory accesses are completed. The M3_Reset keeps
the pico-processor in its reset state. Once the M3_Reset is cleared, the pico-processor will start execution
from address 0x’800’.
Table 31: DASL Temperature Range
Junction Temperature
0
o
C to 100
o
C
Table 32: Instruction Memory in Processor Address Space
Instruction Memory Lowest Address
x’800’
Instruction Memory Highest Address
x’FFF’
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