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| 型號： | IBM32NPR101EPXCAC133 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 95/131頁 |
| 文件大?。?/td> | 1679K |
| 代理商： | IBM32NPR101EPXCAC133 |
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PRS28.4G
IBM Packet Routing Switch
prs28.03.fm
August 31, 2000
I/O Definitions and Timing
Page 95 of 131
Flow Control Signals
MEM_GRANT(0:3)
Output
MEM_GRANT(
n
) provides the grant status of the shared memory for priority
n
.
The MEM_GRANT pins are updated every four clock cycles (of 9 to 10 ns).
See
Functional Description
on page 25.
The device pin encoding and corresponding grant definition is as follows:
0000:
No Grant
1000:
Priority 0, or control packets
1100:
Priority 0 or 1, or control packets
1110:
Priority 0 .. 2, or control packets
1111:
Priority 0 .. 3, or control packets
others: Reserved.
The MEM_GRANT device pins are always active and always reflect the latest mem-
ory full information.
When two devices are in external speed expansion, only the MEM_GRANT bus from
the master device is used.
SND_GRANT(0:15)
Input
Grants the output ports the opportunity to transmit packets. When bit
n
is active, a
packet can be transmitted on port
n
. When inactive, Data Packets are not allowed to
be transmitted, and only Idle Packets will come out. Note that, when a Data packet is
to be transmitted, the packet of highest available priority will be transmitted.
When two devices are in external speed expansion, the SND_GRANT bus of the
slave device is not used and thus not connected (internal pull-up).
RCV_GRANT(0:15)
Input
Provides a grant to receive packets for each output. Incoming packets will only be
received for output
n
if the RCV_GRANT(
n
) is active high. Packets destined for out-
puts for which the RCV_GRANT is deasserted will not be enqueued in those outputs.
The RCV_GRANT pins are to be used only for Data Packets with Active bit = ‘1’b, and
Backup bit = ‘0’b.
When two devices are in external speed expansion, the RCV_GRANT bus of the
slave device is not used and thus not connected (internal pull-up).
Q_FULL(0:15)
Output
Provides the full status of all 16 output queues. Bit
n
carries the status of output queue
n
, for all priorities, in the time multiplexed manner. For each priority, the signal is valid
for four clock cycles. When Q_SYNC is active high, Q_FULL carries the status of the
16 queues for priority 0. It is followed four cycles later by priority 1, in another four
cycles by priority 2, in another four cycles by priority 3. Note that only the number of
priorities programmed in the Configuration Register 0 is reported. Thus, if only three
priorities are enabled, the multiplexing cycle will be: priority 0 (Q_SYNC active), prior-
ity 1, priority 2, priority 0 (Q_SYNC active) and so forth.
When two devices are in external speed expansion, only the Q_FULL bus from the
master device is used.
Q_EMPTY(0:15)
Output
Provides the empty status of all 16 output queues. Bit n carries the status of output
queue n, for all priorities, in the time multiplexed manner. For each priority, the signal
is valid for four clock cycles. When Q_SYNC is active high, Q_EMPTY, carries the
status of the 16 queues for priority 0. It is followed four cycles later by priority 1, in
another four cycles by priority 2, and in another four cycles by priority 3. Note that only
the number of priorities programmed in the Configuration Register 0 is reported. Thus,
if only three priorities are enabled, the multiplexing cycle will be: priority 0 (Q_SYNC
active), priority 1, priority 2, priority 0 (Q_SYNC active), and so forth.
When two devices are in external speed expansion, only the Q_EMPTY bus from the
master device is used.
Q_SYNC
Output
Used as a framing bit for the Q_FULL(0:15) and Q_EMPTY(0:15) busses and is active
when the status of priority 0 is valid for all 16 bits of the bus.
When two devices are in external speed expansion, only the Q_SYNC bit from the
master device is used.
Table 21: Signal Definitions
(Page 2 of 6)
Signal Name
Type
Description
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