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| 型號： | IBM32NPR101EPXCAC133 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 91/131頁 |
| 文件大小： | 1679K |
| 代理商： | IBM32NPR101EPXCAC133 |
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PRS28.4G
IBM Packet Routing Switch
prs28.03.fm
August 31, 2000
Reset, Initialization, and Operation
Page 91 of 131
3. Sync Status and Sync Hunt registers 0x’08‘
4. Sync Packet Transmit register 0x’09‘
5. Signal detect Interrupt in Status register bit 12
The Sync Status register reports the status of the input receiver, and the Sync Hunt register forces the input
ports to start the synchronization sequence.
The Sync Packet Transmit register specifies on which port the sync packets are to be transmitted in order for
the remote device input port to synchronize. While sync packets are transmitted on an output port, Data
Packets destined to that output port will be discarded at the same rate as if they were actually sent on the
line. When not transmitting Sync packets, the output ports transmit normal traffic packets, Data Packets or
Idle Packets.
Also, when the PRS28.4G is used in external speed expansion, the local processor must set the Sync Hunt
register and check the Sync Status register on both devices separately. Similarly, it has to inform both the
master and slave device to transmit sync packets via the Sync Packet Transmit registers.
In summary, the following steps must be taken in order to synchronize input ports, either after reset and
initialization of the device, or when the control processor decides to resynchronize a link due to data errors on
the incoming packets. Even if on both the switch port and the remote device the same steps must be taken
they don’t have to be synchronous, but the global sequence of operation must be followed:
1. Disable the switch, by writing ‘0’b in register 0x‘03’ (it takes between 10 to 60ms to be effective), and
remote chip ports
2. Enable the switch, by writing ‘1’b in register 0x‘03’ (it takes between 10 to 60ms to be effective), and
remote chip ports
3. Disable DASL transmission. For the switch this imply writing a ‘1’b (it is bit map field) into the M3 picopro-
cessor address 0x‘400’ to disable ‘transmit sync enable’ internal line through command register 0x’1C’,
0x‘1D’ and 0x‘17’.
4. Check for valid connectivity of the receiver to a differential transmitter through the no signal register. This
is to ensure the integrity of the serial links.
5. Enable ‘Transmit Sync Packets’.
6. Enable DASL transmission. For the switch this imply writing a ‘0’b (it is bit map field) into the M3 picopro-
cessor address 0x‘400’ to validate ‘transmit sync enable’ internal line through command register 0x’1C’,
0x‘1D’ and 0x’17‘.
7. Write to the Sync Hunt register for the enabled ports to start synchronization.
8. Poll the Sync Status register to verify completion of synchronization after a Sync Time-Out period. If
some ports failed to synchronize, their Sync Status bits will be ‘0’b.
9. When synchronization has been achieved the local processor reports to the control processor that it is
ready for data transfer. Similarly the remote device does the same reporting.
10. Read CRC port ID register 0x‘0A’ and CRC error counter register to clear any CRC error indication that
might have been set up during synchronization period.
11. Upon reception of both reports, the control processor indicates to both ends of the full duplex link (switch
port and remote device) to stop transmitting Sync packets. Normal packet transfer (idle or data) on the
input ports can then be initiated.
12. As the link is now in data mode, the switch control has to poll the CRC Error registers and the No Signal
register to check for error free operation.
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