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參數(shù)資料
| 型號： | HYB25L512160AC |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 512MBit Mobile-RAM |
| 中文描述： | 512兆移動RAM |
| 文件頁數(shù)： | 28/50頁 |
| 文件大?。?/td> | 1335K |
| 代理商： | HYB25L512160AC |
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HYB25L512160AC–7.5
512MBit Mobile-RAM
Functional Description
Data Sheet
28
Rev. 1.3, 2004-04
10212003-BSPE-77OL
Figure 24
READ to WRITE Timing
3.4.5.5
A READ burst may be followed by, or truncated with a PRECHARGE command to the same bank (provided that
Auto Precharge was not activated), as shown in
Figure 25
.
The PRECHARGE command should be issued x clock cycles before the clock edge at which the last desired data
element is valid, where x equals the CAS latency for READ bursts minus 1. Following the PRECHARGE
command, a subsequent ACTIVE command to the same bank cannot be issued until t
RP
is met. Please note that
part of the row precharge time is hidden during the access of the last data elements.
In the case of a READ being executed to completion, a PRECHARGE command issued at the optimum time (as
described above) provides the same operation that would result from the same READ burst with Auto Precharge
enabled. The disadvantage of the PRECHARGE command is that it requires that the command and address
busses be available at the appropriate time to issue the command. The advantage of the PRECHARGE command
is that it can be used to truncate bursts.
READ to PRECHARGE
Figure 25
READ to PRECHARGE Timing
Ba A, Col n (b) = bank A, column n (b)
DO n = Data Out from column n; DI b = Data In to column b;
DQM is asserted HIGH to set DQs to High-Z state for 1 clock cycle prior to the WRITE command.
= Don't Care
CLK
CL=2
CL=3
Command
NOP
READ
NOP
NOP
NOP
NOP
NOP
WRITE
Address
Ba A,
Col b
Ba A,
Col n
DQM
DQ
DO n
DI b
DI b+1
DO n+1
High-Z
DI b+2
DQ
DI b
DI b+1
DO n
High-Z
DI b+2
Ba A, Col n = bank A, column n; BA Am Row = bank A, row x
DO n = Data Out from column n
Burst Length = 4 in the case shown.
CAS latency = 3 in the case shown
3 subsequent elements of Data Out are provided in the programmed order following DO n.
= Don't Care
CL=3
CLK
t
RP
Command
NOP
READ
NOP
NOP
NOP
NOP
ACT
PRE
Ba A,
Row a
Address
Ba A
Ba A,
Col n
Dis AP
Pre Bank A
Pre All
A10
(AP)
AP
DQ
DO n+1
DO n
DO n+2
DO n+3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB25L512160AC-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HYB3116160BSJ | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
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