參數(shù)資料
型號: HYB25L512160AC
廠商: INFINEON TECHNOLOGIES AG
英文描述: 512MBit Mobile-RAM
中文描述: 512兆移動RAM
文件頁數(shù): 27/50頁
文件大?。?/td> 1335K
代理商: HYB25L512160AC
HYB25L512160AC–7.5
512MBit Mobile-RAM
Functional Description
Data Sheet
27
Rev. 1.3, 2004-04
10212003-BSPE-77OL
3.4.5.3
DQM may be used to suppress read data and place the output buffers into High-Z state. The generic timing
parameters as listed in
Table 10
also apply to this DQM operation. The read burst in progress is not affected and
will continue as programmed.
READ - DQM Operation
Figure 23
READ Burst - DQM Operation
3.4.5.4
A READ burst may be followed by or truncated with a WRITE command. The WRITE command can be performed
to the same or a different (active) bank. Care must be taken to avoid bus contention on the DQs; therefore it is
recommended that the DQs are held in High-Z state for a minimum of 1 clock cycle. This can be achieved by either
delaying the WRITE command, or suppressing the data-out from the READ by pulling DQM HIGH two clock cycles
prior to the WRITE command, as shown in
Figure 24
. With the registration of the WRITE command, DQM acts as
a write mask: when asserted HIGH, input data will be masked and no write will be performed.
Please note that truncation of a READ burst by a subsequent READ or WRITE is only possible when both
commands are issued to the same chip of this stacked configuration.
READ to WRITE
Ba A, Col n = bank A, column n
DO n = Data Out from column n
CL = 2 in the case shown.
DQM read latency t
DQZ
is 2 clock cycles
= Don't Care
CLK
Command
NOP
READ
NOP
NOP
NOP
NOP
NOP
NOP
DQM
t
DQZ
Address
Ba A,
Col n
DQ
DO n+2
DO n
DO n+3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB25L512160AC-7.5 制造商:Rochester Electronics LLC 功能描述:- Bulk
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HYB3116160BSJ-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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