- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98068 > S1C6S460D 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124 PDF資料下載
參數(shù)資料
| 型號： | S1C6S460D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124 |
| 封裝： | 4.69 X 4.68 MM, DIE-124 |
| 文件頁數(shù)： | 91/107頁 |
| 文件大?。?/td> | 788K |
| 代理商： | S1C6S460D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁當前第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁
76
EPSON
S1C6S460 TECHNICAL MANUAL
CHAPTER 11: INTERRUPT AND HALT
11.1 Interrupt Factor Flag and Interrupt Mask
The corresponding interrupt factor flag is set to "1" with the individual interrupt element.
If the following conditions exist, interrupt for the CPU occurs when the interrupt factor flag is set to "1".
The corresponding interrupt mask register is set at "1" (enable).
The interrupt flag is set at "1" (EI).
The interrupt factor flag is reset to "0" at the read-only register by reading the data.
Be sure that the interrupt factor flag reading is done with the interrupt in the DISABLE state (DI). Read-
ing the interrupt factor flag while in the ENABLE state (EI) may cause malfunction.
At initial reset, the interrupt factor flag is reset to "0".
The interrupt can be masked by the corresponding interrupt mask register.
The interrupt mask register is a register capable of read/write operation; by writing "1", it is enabled
(interrupt is allowed) and by writing "0", it is masked (interrupt is prohibited).
Be sure that writing to the interrupt mask register is done with the interrupt in the DISABLE state (DI).
Writing to the interrupt mask register while in the ENABLE state (EI) may cause malfunction.
At initial reset, the interrupt mask register is set to "0".
The interrupt factor flag is set to "1" by interrupt factor even if the interrupt is masked. (The input
interrupt factor flags IK0 and IK1 will be eliminated.)
Table 11.1.1 shows the correspondence between interrupt factor flags and interrupt mask registers.
Table 11.1.1 Interrupt factor flags and interrupt mask registers
Interrupt factor
Interrupt factor flag
Interrupt mask register
Falling edge of clock timer (1 Hz)
IT1 (F00H [D3])
EIT1 (F10H [D3])
Falling edge of clock timer (2 Hz)
IT2 (F00H [D2])
EIT2 (F10H [D2])
Falling edge of clock timer (8 Hz)
IT8 (F00H [D1])
EIT8 (F10H [D1])
Falling edge of clock timer (32 Hz)
IT32 (F00H [D0])
EIT32 (F10H [D0])
Overflow of stopwatch timer (SWH) (1 Hz)
ISW1 (F01H [D1])
EISW1 ( F11H [D1])
Overflow of stopwatch timer (SWL) (10 Hz)
ISW0 (F01H [D0])
EISW0 ( F11H [D0])
No matching between input ports (K00–K03)
IK0 (F04H [D0])
EIK03 (F14H [D3])
and input relation registers (DFK00–DFK03)
EIK02 (F14H [D2])
EIK01 (F14H [D1])
EIK00 (F14H [D0])
Falling edge of input ports (K10–K13)
IK1 (F05H [D0])
EIK13 (F15H [D3])
EIK12 (F15H [D2])
EIK11 (F15H [D1])
EIK10 (F15H [D0])
Data (8 bits) input/output of serial interface has completed
ISIO (F03H [D0])
EISIO (F13H [D0])
Counter value of programmable timer = 00H
IPT (F02H [D0])
EIPT (F12H [D0])
相關PDF資料 |
PDF描述 |
|---|---|
| S1C88104P0A0100 | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PBGA240 |
| S1C88317D0A0100 | MICROCONTROLLER, UUC170 |
| S1C88308D0A0100 | MICROCONTROLLER, UUC170 |
| S1C88308F0A0100 | MICROCONTROLLER, PQFP160 |
| S1C88348F | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP16 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| S1C7309X | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:B/W CCD PROCESSOR |
| S1C7309X01 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:B/W CCD PROCESSOR |
| S1C88349 | 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer |
| S1C88649 | 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer |
| S1C88650 | 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer |
發(fā)布緊急采購，3分鐘左右您將得到回復。