參數(shù)資料
型號(hào): S1C6S460D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124
封裝: 4.69 X 4.68 MM, DIE-124
文件頁(yè)數(shù): 67/107頁(yè)
文件大小: 788K
代理商: S1C6S460D
54
EPSON
S1C6S460 TECHNICAL MANUAL
CHAPTER 8: TIMERS
8.2.4 Control of stopwatch timer
The control registers for the stopwatch timer are explained below.
Table 8.2.4.1 Control registers of stopwatch timer
Address
Comment
Register
D3
D2
D1
D0
Name
Init
1
0
F01H
ISW0
R
0
ISW1
ISW0
0
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
No
ISW1
0
F11H
EISW0
R/W
0
EISW1
EISW0
0
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
Enable
Mask
EISW1
0
R
F22H
R
SWL3
SWL2
SWL1
SWL0
0
F23H
SWH0
R
SWH3
SWH2
SWH1
SWH0
0
SWH1
SWH2
SWH3
SWL0
SWL1
SWL2
SWL3
Stopwatch timer
1/100 sec data (BCD)
MSB
LSB
Stopwatch timer
1/10 sec data (BCD)
MSB
LSB
F77H
0
SWRST
SWRUN
Reset
0
Stopwatch timer reset
Stopwatch timer Run/Stop
Reset
Run
Stop
0
SWRUN
R/W
SWRST
W
R
SWRST (F77H [D1], W)
This bit resets the stopwatch timer.
When "1" is written: Stopwatch timer reset
When "0" is written: No operation
Reading: Always "0"
By writing "1" on SWRST, the stopwatch timer is reset. All timer data is set to "0".
When the stopwatch timer is reset in the RUN mode, it will re-start counting immediately after the reset
and at STOP mode, the reset data is maintained.
Because this bit is for writing only, it is always "0" during reading.
SWRUN (F77H [D0], R/W)
This register controls RUN/STOP of the stopwatch timer.
When "1" is written: RUN
When "0" is written: STOP
Reading: Valid
By writing "1" on SWRUN, the stopwatch timer performs counting operation. Writing "0" will make the
stopwatch stop counting.
Even if the stopwatch is stopped, the timer data at that point is kept.
When data of the counter is read at run mode, proper reading may not be obtained due to the carry from
low-order digits (SWL) into high-order digits (SWH) (i.e., in case SWL and SWH reading span the timing
of the carry). To avoid this occurrence, perform the reading after suspending the counter once and then
set the SWRUN to "1" again.
Moreover, it is required that the suspension period not exceed 976 s (1/4 cycle of 256 Hz).
At initial reset, SWRUN is set to "0".
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