參數(shù)資料
型號: S1C6S460D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124
封裝: 4.69 X 4.68 MM, DIE-124
文件頁數(shù): 12/107頁
文件大小: 788K
代理商: S1C6S460D
4
EPSON
S1C6S460 TECHNICAL MANUAL
CHAPTER 1: OUTLINE
1.4 Pin Description
Table 1.4.1 Pin description
Pin name
VDD
VSS
VS1
VL1–VL5
VREF
CA–CF
OSC1
OSC2
OSC3
OSC4
COM0–COM15
SEG0–SEG39
K00–K03
K10–K13
P00–P03
P10–P13
P20–P23
P30–P33
R00–R03
R10–R13
R20–R23
R30–R32
R33
R40
R41
R42
R43
SIN
SOUT
SCLK
RESET
TEST
Function
Power supply (+)
Power supply (-)
Internal logic system/oscillation system regulated voltage output
LCD system power supply
1/4 bias generated internally, 1/5 bias generated externally *1
LCD system power test pin *2
LCD system voltage booster condenser connecting pin
Crystal or CR oscillator input *1
Crystal or CR oscillator output *1, CD buiil-in
CR or ceramic oscillator input *1
CR or ceramic oscillator output *1
LCD common output (1/8 duty or 1/16 duty is selected on software)
LCD segment output
Input port (pull up resistor is available by mask option) *1
I/O port
I/O port or output port *1
Output port
Output port, SRDY output or PTCLK output *1
Output port or FOUT output *1
Output port
Output port, BZ output or FOUT output *1
Output port or BZ output *1
Serial interface data input
Serial interface data output
Serial interface clock input/output
Initial reset input terminal
Testing input terminal *3
Pin No.
125
117
122
127, 128, 1–3
126
10–6, 4
124
123
121
120
11–26
67–35, 33–27
79–76
75–72
95–92
91–88
87–84
83–80
116–113
112–109
108–105
104–102
101
100
99
97
96
71
70
68
118
119
I/O
O
I
O
I
O
I
I/O
O
I
O
I/O
I
Complementary output or
Nch open drain output *1
1
2
3
Selected by mask option
Leave the VREF pin unconnected (N.C.).
The TEST pin is used when the IC load is being detected. During ordinary operation be certain to connect this pin to VDD.
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