參數(shù)資料
型號(hào)： S1C6S460D
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124
封裝： 4.69 X 4.68 MM, DIE-124
文件頁數(shù)： 101/107頁
文件大小： 788K
代理商： S1C6S460D
S1C6S460 TECHNICAL MANUAL
EPSON
85
CHAPTER 12: SUMMARY OF NOTES
12.3 Precautions on Mounting
Oscillation Circuit
Oscillation characteristics change depending on conditions (board pattern, components used, etc.).
In particular, when a ceramic oscillator or crystal oscillator is used, use the oscillator manufacturer's
recommended values for constants such as capacitance and resistance.
Disturbances of the oscillation clock due to noise may cause a malfunction. Consider the following
points to prevent this:
(1) Components which are connected to the OSC1 (OSC3) and OSC2
(OSC4) terminals, such as oscillators, resistors and capacitors,
should be connected in the shortest line.
(2) As shown in the figure, make a VDD pattern as large as possible at
circumscription of the OSC1 (OSC3) and OSC2 (OSC4) terminals
and the components connected to these terminals.
Furthermore, do not use this VDD pattern for any purpose other
than the oscillation system.
In order to prevent unstable operation of the oscillation circuit due to current leak between OSC1
(OSC3) and VSS, please keep enough distance between OSC3 and VSS or other signals on the board
pattern.
Reset Circuit
The power-on reset signal which is input to the RESET terminal changes depending on conditions
(power rise time, components used, board pattern, etc.).
Decide the time constant of the capacitor and resistor after enough tests have been completed with the
application product.
When using the built-in pull-up resistor of the RESET terminal, take into consideration dispersion of
the resistance for setting the constant.
In order to prevent any occurrences of unnecessary resetting caused by noise during operating,
components such as capacitors and resistors should be connected to the RESET terminal in the
shortest line.
Power Supply Circuit
Sudden power supply variation due to noise may cause malfunction. Consider the following points to
prevent this:
(1) The power supply should be connected to the VDD and VSS terminal with patterns as short and
large as possible.
Furthermore, similar consideration is necessary when VL1–VL5 are supplied from outside the IC.
(2) When connecting between the VDD and VSS terminals with a bypass capacitor, the terminals
should be connected as short as possible.
VDD
VSS
Bypass capacitor connection example
VDD
VSS
(3) Components which are connected to the VS1, VL1–VL5 terminals, such as capacitors and resistors,
should be connected in the shortest line.
In particular, the VL1–VL5 voltages affect the display quality.
Do not connect anything to the VL1–VL5 terminals when the LCD driver is not used.
OSC4
OSC3
VDD
Sample VDD pattern (OSC3)
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