參數(shù)資料
型號(hào): S1C6S460D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC124
封裝: 4.69 X 4.68 MM, DIE-124
文件頁(yè)數(shù): 43/107頁(yè)
文件大?。?/td> 788K
代理商: S1C6S460D
32
EPSON
S1C6S460 TECHNICAL MANUAL
CHAPTER 6: INPUT/OUTPUT PORTS
6.1.4 Control of input ports
The control registers for the input ports are explained below.
Table 6.1.4.1 Control registers of input ports
Address
Comment
Register
D3
D2
D1
D0
Name
Init
1
0
F04H
IK0
R
0
IK0
0
Interrupt factor flag (K00–K03)
Yes
No
0
F05H
IK1
R
0
IK1
0
Interrupt factor flag (K10–K13)
No
0
F14H
EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
Interrupt mask register (K03)
Interrupt mask register (K02)
Interrupt mask register (K01)
Interrupt mask register (K00)
Enable
Mask
EIK01
EIK02
EIK03
F15H
EIK10
R/W
EIK13
EIK12
EIK11
EIK10
0
Interrupt mask register (K13)
Interrupt mask register (K12)
Interrupt mask register (K11)
Interrupt mask register (K10)
Enable
Mask
EIK11
EIK12
EIK13
F40H
K00
R
K03
K02
K01
K00
High
Low
K01
K02
K03
F41H
DFK00
R/W
DFK03
DFK02
DFK01
DFK00
1
DFK01
DFK02
DFK03
F42H
K10
R
K13
K12
K11
K10
High
Low
K11
K12
K13
Input port (K00–K03)
Input relation register (DFK00–DFK03)
Input port (K10–K13)
K00–K03, K10–K13 (F40H, F42H, R)
Input data of the input port terminal may be read out with these registers.
When "1" is read: High level
When "0" is read: Low level
Writing: Invalid
The terminal voltage of 8 bits input ports (K00–K03 and K10–K13) are each reading as "1" and "0" at high
(VDD) level and low (VSS) level, respectively.
When these bits are used for reading only, writing operation becomes invalid.
DFK00–DFK03 (F41H, R/W)
These input relation registers which set the interrupt generating conditions of K00–K03.
When "1" is written: Falling edge
When "0" is written: Rising edge
Reading: Valid
When DFK0x is set to "1", the falling edge of the input becomes an interrupt generating condition, the
rising edge when set to "0". DFK0x respectively correspond to input ports K0x and may be set in units of
1 bit.
At initial reset, these registers are all set to "1".
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