
Overview
MOTOROLA
ColdFire2/2M User’s Manual
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1-21
Table 1-5. Instruction Set Summary
INSTRUCTION
ADD
OPERAND SYNTAX
Dy,<ea>,x
<ea>y,Dx
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
Dy,<ea>x
<ea>y,Dx
#<data>,Dx
Dx,Dy
#<data>,Dn
Dx,Dy
<data>,Dx
<label>
OPERAND SIZE
32
32
OPERATION
Source + Destination
→
Destination
ADDA
ADDI
ADDQ
ADDX
AND
32
32
32
32
32
32
Source + Destination
→
Destination
Immediate Data + Destination
→
Destination
Immediate Data + Destination
→
Destination
Source + Destination + X
→
Destination
Source L Destination
→
Destination
ANDI
ASL
32
32
32
32
32
8,16
Immediate Data L Destination
→
Destination
X/C
←
(Dy << Dx)
←
0
X/C
←
(Dy << #<data>)
←
0
MSB
→
(Dy >> Dx)
→
X/C
MSB
→
(Dy >> #<data>)
→
X/C
If Condition True, Then PC + d
n
→
PC
~(<Bit Number> of Destination)
→
Z, Bit of Destination
ASR
Bcc
BCHG
Dy,<ea>x
#<data>,<ea>x
Dy,<ea>x
#<data>,<ea>x
<label>
8,32
8,32
8,32
8,32
8,16
BCLR
~(<Bit Number> of Destination)
→
Z, 0
→
Bit of Destination
BRA
PC + d
n
→
PC
BSET
Dy,<ea>x
#<data>,<ea>x
<label>
8,32
8,32
8,16
~(<Bit Number> of Destination)
→
Z, 1
→
Bit of Destination
BSR
SP – 4
→
SP; PC
→
(SP); PC + d
n
→
PC
~(<Bit Number> of Destination)
→
Z
BTST
Dy,<ea>x
#<data>,<ea>x
<ea>x
#<data>,Dx
<ea>y,Dx
<ea>y,Ax
(An)
Dy,<ea>x
#<data>,Dx
Dx
Dx
Dx
none
<ea>y
<ea>y
<ea>y,Ax
Ax,#<data>
Dx,Dy
#<data>,Dx
Dx,Dy
#<data>,Dx
Rw,Rx ,<shift>
8,32
8,32
8,16,32
8,16,32
32
32
32
32
32
8
→
16
16
→
32
8
→
32
none
none
none
32
32
32
32
32
32
CLR
CMPI
CMP
CMPA
CPUSH
EOR
EORI
EXT
0
→
Destination
Destination – Immediate Data
Destination - Source
Destination - Source
Push and Invalidate Cache Line
Source
⊕
Destination
→
Destination
Immediate Data
⊕
Destination
→
Destination
Sign-Extended Destination
→
Destination
EXTB
HALT
JMP
JSR
LEA
LINK
LSL
Sign-Extended Destination
→
Destination
Enter Halted State
<ea>y
→
PC
SP – 4
→
SP; Next PC
→
(SP); <ea>y
→
PC
Address of <ea>
→
An
SP – 4
→
SP; Ax
→
(SP); SP
→
Ax; SP + d16
→
SP
X/C
←
(Dy << Dx)
←
0
X/C
←
(Dx << #<data>)
←
0
0
→
(Dy >> Dx)
→
X/C
0
→
(Dx >> #<data>)
→
X/C
ACC + (Rw
×
Rx){ << 1 | >> 1}
→
ACC
LSR
MAC
16
×
16
+ 32 →
32
32
×
32
+ 32 →
32
16
×
16
+ 32 →
32
32
×
32
+ 32 →
32
8,16,32
32
16
MACL
Rw,Rx,<shift>,<ea>,Ry
ACC + (Rw
×
Rx){ << 1 | >> 1}
→
ACC; (<ea>{& MASK})
→
Ry
MOVE
<ea>y,<ea>x
ACC,Rx
Dx
Source
→
Destination
ACC
→
Rn
CCR
→
Destination
MOVE from ACC
MOVE from CCR
NOTE:
Available on the ColdFire2M only.
F
Freescale Semiconductor, Inc.
n
.