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| 型號(hào)： | XRT94L31IB-L |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 58/133頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MAPPER DS3/E3/STS-1 504TBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 應(yīng)用： | 網(wǎng)絡(luò)切換 |
| 接口： | 總線 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 封裝/外殼： | 504-LBGA |
| 供應(yīng)商設(shè)備封裝： | 504-TBGA（35x35） |
| 包裝： | 托盤(pán) |
| 安裝類(lèi)型： | 表面貼裝 |
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XRT94L31
30
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
E12
E17
AB16
TxOH_0
TxOH_1
TxOH_2
I
TTL
Transmit Overhead Data Input:
This input pin functions as the Transmit Overhead Data output indicator
for the transmit system side interface when the XRT94L31 is configured
to operate in STS-1/DS3/E3 mode, however, it functions as the Transmit
STS-1 Overhead Enable output when the device is configured to operate
in the STS-1 mode.
When configured to operate in DS3/E3 mode:
The Transmit Overhead Data Input Interface accepts overhead via these
input pins, and insert this data into the overhead bit positions within the
outbound DS3 or E3 frames. If the TxOHIns_n input pin is pulled "High",
then the Transmit Overhead Data Input Interface will sample the over-
head data, via this input pin, upon the falling edge of the TxOHClk_n out-
put signal.
Conversely, if the TxOHIns_n input pin is NOT pulled "High", then the
Transmit Overhead Data Input Interface block will be inactive and will not
accept any overhead data via the TxOH_n input pin.
When configured to operate in STS-1 mode:
These input pins are used to do the following.
a. To insert the POH data into each of the 3 Transmit STS-1 POH
Processor blocks (for insertion and transmission via each of the
outbound STS-1 signals).2.
b. To insert the TOH data into each of the 3 Transmit STS-1 TOH
Processor blocks (for insertion and transmission via each of the
outbound STS-1 signals).
The function of these input pins, depend upon whether or not the user
has opted to insert the TOH data into the 3 Transmit STS-1 TOH Proces-
sor blocks.
If the user is only inserting POH data via these input pins:
In this mode, the external circuitry (which is being interfaced to the
Transmit Path Overhead Input Port is suppose to monitor the following
output pins.
TxOHFrame_n
TxOHEnable_n
TxOHClk_n
The TxOHFrame_n output pin will toggle "High" upon the falling edge of
TxOHClk_n approximately one TxOHClk_n period prior to the TxOH port
being ready to accept and process the first bit within J1 byte (e.g., the
first POH byte). The TxOHFrame_n output pin will remain "High" for
eight consecutive TxOHClk_n periods. The external circuitry should use
this pin to note STS-1 SPE frame boundaries.
The TxOHEnable_n output pin will toggle "High" upon the falling edge of
TxOHClk_n approximately one TxOHClk_n period prior to the TxOH port
being ready to accept and process the first bit within a given POH byte.
If the user wishes to externally insert a given POH byte;
a. assert the TxOHIns_n input pin by toggling it "High", and
b. place the value of the first bit (within this particular POH byte) on
this input pin upon the very next falling edge of TxOHClk_n.
This data bit will be sampled upon the very next falling edge of
TxOHClk_n. The external circuitry should continue to keep the
TxOHIns_n input pin "High" and advancing the next bits (within the POH
bytes) upon each rising edge of TxOHClk_n.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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