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XRT94L31
126
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
NOTE: The values for t31 and t32 can be found in
1.13
RECEIVE SECTION DCC EXTRACTION OUTPUT PORT
The Receive Section DCC output port provides a dedicated port for the user to extract out the Section DCC
(e.g., D1, D2 and D3) bytes from that within the incoming STS-3/STM-1 data-stream. The user should note
that all of the output signals (of this port) are updated upon the falling edge of RxTOHClk. The timing wave-
form and information for the Receive Section DCC output port is presented below.
FIGURE 29. ILLUSTRATION OF THE TIMING WAVE-FORM OF THE RECEIVE ORDER-WIRE BYTE OVERHEAD OUTPUT
PORT
TABLE 30: TIMING INFORMATION FOR THE RECEIVE ORDER-WIRE BYTE OVERHEAD OUTPUT PORT
SYMBOL
DESCRIPTION
MIN.
TYP.
MAX.
t31
Falling edge of RxTOHClk to rising edge of RxE1F1E2Frame and
RxE1F1E2Valid
-0.6ns
0.4ns
t32
Falling edge of RxTOHClk to RxE1F1E2 output delay
0.1ns
0.3ns
RxE1F1E2
RxTOHClk
RxE1F1E2Fr
RxE1F1E2Val
t31
t32