REV. 1.0.1 W25 AC27 V23 AB26 Y25 AC26 W24 AA25 GPI0_0 GPI0_1 GPI0_2 GPI0_3 GPI0_4 G" />
參數(shù)資料
型號： XRT94L31IB-L
廠商： Exar Corporation
文件頁數(shù)： 121/133頁
文件大?。?/td> 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
標準包裝： 24
應(yīng)用： 網(wǎng)絡(luò)切換
接口： 總線
電源電壓： 3.14 V ~ 3.47 V
封裝/外殼： 504-LBGA
供應(yīng)商設(shè)備封裝： 504-TBGA（35x35）
包裝： 托盤
安裝類型： 表面貼裝
XRT94L31
88
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
W25
AC27
V23
AB26
Y25
AC26
W24
AA25
GPI0_0
GPI0_1
GPI0_2
GPI0_3
GPI0_4
GPI0_5
GPI0_6
GPI0_7
I/O
TTL/
CMOS
General Purpose Input/Output pin:
NOTE: x = 0:7
This input pin can be configured to function as either an input or output
pin by writing the appropriate value into Bit x (GPIO_DIR_x), within the
Operation General Purpose Input/Output Direction Register - 0 (Address
Location = 0x014B).
If this pin is configured to be an input pin the state of this pin can be mon-
itored by reading the state of Bit x (GPIO_x) within the Operation Gen-
eral Purpose Input/Output Register - Byte 0 (Address Location =
0x0147).
If this pin is configured to be an output pin the state of this pin can be
controlled by writing the appropriate value into Bit x (GPIO_x) within the
Operation General Purpose Input/Output Register - Byte 0 (Address
Location = 0x0147).
CLOCK INPUTS
E7
REFCLK34
I
TTL
E3 Reference Clock Input for the Jitter Attenuator within the DS3/E3
Mapper Block:
To operate any of the channels (within the XRT94L31) in the E3 Mode,
apply a clock signal with a frequency of 34.368±20ppm to this input pin.
This input pin functions as the timing reference for the DS3/E3/STS-1 Jit-
ter Attenuator (within the DS3/E3 Mapper block) for E3 applications.
For E3 Applications, the DS3/E3 Framer block will use this input clock
signal, as a timing source in order to transmit the E3 AIS pattern, in the
Egress Direction (e.g., from the XRT94L31 to the DS3/E3/STS-1 LIU
IC).
NOTE: Connect this pin to GND if none of the channels of the XRT94L31
are to be operated in the E3 or if the XRT94L31 is to be
operated in the SFM mode.
D5
REFCLK51
I
TTL
STS-1 Reference Clock Input for the Jitter Attenuator within the
DS3/E3 Mapper Block.
To operate any of the channels (within the XRT94L31) in the STS-1/
STM-0 Mode, apply a clock signal with a frequency of 51.84MHz±20ppm
to this input pin. This input pin functions as the timing reference for the
DS3/E3/STS-1 Jitter Attenuator (within the DS3/E3 Mapper block) for
STS-1 applications.
NOTES:
1. If the XRT94L31 is to be operated in the SFM Mode, apply a
12.288MHz±20ppm clock signal to this input pin.
2. If the user does not intend to operate any of the channels in the
STS-1/STM-0 Mode, connect this input pin to GND.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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