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| 型號(hào)： | XRT94L31IB-L |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 105/133頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MAPPER DS3/E3/STS-1 504TBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 應(yīng)用： | 網(wǎng)絡(luò)切換 |
| 接口： | 總線 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 封裝/外殼： | 504-LBGA |
| 供應(yīng)商設(shè)備封裝： | 504-TBGA（35x35） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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XRT94L31
73
REV. 1.0.1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
C17
E25
AF10
STS1RXD_C1J1_0
TXDS3LINECLK_0
STS1RXD_C1J1_1
TXDS3LINECLK_1
STS1RXD_C1J1_2
TXDS3LINECLK_2
O
CMOS
STS-1 Receive Telecom Bus - C1/J1 Byte Phase Indicator Output
Signal - Channel n:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface for Channel n has been enabled.
If STS-1 Telecom Bus (Channel n) has been enabled - STS-1
Receive Telecom Bus - C1/J1 Byte Phase Indicator Output Signal:
This output pin pulses "High" under the following two conditions.When-
ever the C1 byte is being output via the STS1RXD_D_0[7:0] output, and
Whenever the J1 byte is being output via the STS1RXD_D_0[7:0] out-
put.
NOTES:
1. The STS-1 Receive (Drop) Telecom Bus (associated with
Channel n) will indicate that it is transmitting the C1 byte (via
the STS1RXD_D_0[7:0] output pins), by pulsing this output pin
"High" (for one period of STS1RXD_CK_0) and keeping the
STS1RXD_PL_0 output pin pulled "Low".
2. The STS-1 Receive (Drop) Telecom Bus (associated with
Channel n) will indicate that it is transmitting the J1 byte (via the
STS1RXD_D_0[7:0] output pins), by pulsing this output pin
"High" (for one period of STS1RXD_CK_0) while the
STS1TXD_PL_0 output pin is pulled "High".
TXDS3LINECLK_0 (Transmit DS3/E3/STS-1 line clock to LIU - Chan-
nel n)
B18
G24
AG9
STS1RXD_DP_0
TXDS3POS_0
STS1RXD_DP_1
TXDS3POS_1
STS1RXD_DP_2
TXDS3POS_2
O
CMOS
STS-1 Receive (Drop) Telecom Bus - Parity Output pin - Channel n:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface for Channel n has been enabled.
If STS-1 Telecom Bus (Channel n) has been enabled
- STS-1 Receive Telecom Bus - Parity Output pin:
This output pin can be configured to function as one of the following.
The EVEN or ODD parity value of the bits which are output via the
STS1RXD_D_0[7:0] output pins.
The EVEN or ODD parity value of the bits which are being output via the
STS1RXD_D_0[7:0] output pins and the states of the STS1RXD_PL_0
and STS1RXD_C1J1_0 output pins.
This output pin will ultimately be used (by drop-side circuitry) to verify the
verify of the data which is output via the STS-1 Telecom Bus Interface
associated with Channel n.
NOTE: The user can make any one of these configuration selections by
writing the appropriate value into the Telecom Bus Control
Register (Address Location = 0x013B).TXDS3POS_0 (Transmit
DS3/E3/STS-1 line data positive to LIU- Channel n)
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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