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| 型號(hào)： | XRT94L31IB-L |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 102/133頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MAPPER DS3/E3/STS-1 504TBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 應(yīng)用： | 網(wǎng)絡(luò)切換 |
| 接口： | 總線 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 封裝/外殼： | 504-LBGA |
| 供應(yīng)商設(shè)備封裝： | 504-TBGA（35x35） |
| 包裝： | 托盤(pán) |
| 安裝類(lèi)型： | 表面貼裝 |
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XRT94L31
70
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
N27
RXUCLK/RXPCLK
I
TTL
For mapper applications, Please connect this pin to GND
A16
J23
AC13
EXTLOS_0
EXTLOS_1
EXTLOS_2
I
TTL
Receive LOS (Loss of Signal) Indicator Input (from an off-chip DS3/
E3/STS-1 LIU IC):
These input pins are intended to be connected to a corresponding RLOS
(Receive Loss of Signal) output pin of an off-chip DS3/E3/STS-1 LIU IC.
Through this connection, if a given LIU Channel declares the LOS defect
condition, it will (in-turn) drive the corresponding EXTLOS_n input pin (to
the XRT94L31) to the logic "High" level.
If the a given channel (within the XRT94L31) is configured to operate in
either the DS3 or E3 Mode, and if the off-chip LIU IC asserts the corre-
sponding EXTLOS_n input pin (by driving it to the logic "High" level),
then the DS3/E3 Framer block (within this particular channel) will auto-
matically declare the LOS defect condition (for the duration that this
input pin is driven to a logic "High".
If the LIU Channel toggles this input pin "Low", then the corresponding
DS3/E3 Framer block (within the XRT94L31) will MOST LIKELY clear
the LOS defect condition.
NOTES:
1. The DS3/E3 Framer block can be configured to declare and
clear the LOS defect condition based upon both the state of this
input pin and the content within the incoming DS3/E3 data-
stream.
However,
the
DS3/E3
Framer
block
will
UNCONDITIONALLY declare the LOS defect condition, if its
corresponding EXTLOS_n input pin is driven to the logic "High"
level.
2. These input pins are ignored if their corresponding Channel
has been configured to operate in the STS-1 Mode.
The
Receive STS-1 TOH Processor block will only declare and
clear the LOS defect condition based the number of
consecutive All Zero bytes that are detected within the
incoming STS-1 data-stream.
A14D
20AE
14
RxOOF_0RxOOF_1R
xOOF_2
O
CMOS
Receive STS-1/DS3/E3 Out of Frame IndicatorThe STS-1/DS3/E3
Receive DS3 Framer will assert this output signal whenever it has
declared an Out of Frame (OOF) condition with the incoming DS3
frames. This signal is negated when the framer correctly locates the F-
and M-bits and regains synchronization with the DS3 frame.
A15B
24AG
14
RxLOS_0RxLOS_1R
xLOS_2
O
CMOS
STS-1/DS3/E3 Framer - Loss of Signal Output Indicator:
This pin is asserted when the Receive Section of the channel encoun-
ters 180 consecutive 0's (for DS3 applications) or 32 consecutive 0's (for
E3 applications) via the RxPOS_n and RxNEG pins. For STS-1 applica-
tions, users can set the LOS threshold value in the Receive LOS Thresh-
old register. (RxSTOH_LOS_TH, Address Location: 0xN02E - 0xN02F)
This pin will be negated once the Receive DS3/E3 Framer has detected
at least 60 1s out of 180 consecutive bits (for DS3 applications) or has
detected at least four consecutive 32 bit strings of data that contain at
least 8 1s in the receive path.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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| XRT94L33_2 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SDH REGISTERS |
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