REV. 1.0.1 AD12 STS1RXD_D1_2 RXHDLCDAT_1_2 RXGFC_2 O CMOS Receive STS-1 Telecom Bus" />
參數資料
型號： XRT94L31IB-L
廠商： Exar Corporation
文件頁數： 113/133頁
文件大?。?/td> 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
標準包裝： 24
應用： 網絡切換
接口： 總線
電源電壓： 3.14 V ~ 3.47 V
封裝/外殼： 504-LBGA
供應商設備封裝： 504-TBGA（35x35）
包裝： 托盤
安裝類型： 表面貼裝
XRT94L31
80
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
AD12
STS1RXD_D1_2
RXHDLCDAT_1_2
RXGFC_2
O
CMOS
Receive STS-1 Telecom Bus - Channel 2 - Output Data Bus pin num-
ber 1:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface, associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled
- STS-1 Receive Telecom Bus - Output Data bus pin number 1:
STS1RXD_D1_2
This output pin along with STS1RXD_D_2[7:2] and STS1RXD_D0_2
function as the STS-1 Receive (Drop) Telecom Bus - Output Data Bus
for Channel 2. The STS-1 Telecom Bus Interface will update the data via
this output upon the rising edge of STS1RXD_CK_2.
RXHDLCDAT_1_2 (Receive HDLC block data output - Channel 2 -
Output Data Bus pin 1)
RXGFC_2 (Receive GFC output data - Channel 2)
AF11
STS1RXD_D2_2RXH
DLCDAT_2_2
RXCELLRXED_2
O
CMOS
Receive STS-1 Telecom Bus - Channel 2 - Output Data Bus pin num-
ber 2:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface, associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled
- STS-1 Receive Telecom Bus - Output Data bus pin number 2:
STS1RXD_D2_2
This output pin along with STS1RXD_D_2[7:3] and STS1RXD_D_2[1:0]
function as the STS-1 Receive (Drop) Telecom Bus - Output Data Bus
for Channel 2. The STS-1 Telecom Bus Interface will update the data via
this output upon the rising edge of STS1RXD_CK_2.
RXHDLCDAT_2_2 (Receive HDLC block data output - Channel 2 -
Output Data Bus pin 2)
RXCELLRXED_2 (Receive cell received indicator - Channel 2)
AE12
STS1RXD_D3_2
RXHDLCDAT_3_2
SSE_NEG
OO
IO
O
CMOS
TTL/
CMOS
Receive STS-1 Telecom Bus - Channel 2 - Output Data Bus pin num-
ber 3:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface, associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled
- STS-1 Receive Telecom Bus - Output Data bus pin number 3:
STS1RXD_D3_2
This output pin along with STS1RXD_D_2[7:4] and STS1RXD_D_2[2:0]
function as the STS-1 Receive (Drop) Telecom Bus - Output Data Bus
for Channel 2. The STS-1 Telecom Bus Interface will update the data via
this output upon the rising edge of STS1RXD_CK_2.
RXHDLCDAT_3_2 (Receive HDLC block data output - Channel 2 -
Output Data Bus pin 3)
SSE_NEG (Slow Speed Interface Data Negative for Egress Path)
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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