
Advanced Notebook I/O for ISA or LPC Designs
Datasheet
Rev. 0.5 (03-24-05)
Page 140
SMSC SIO10N268
DATASHEET
Once a Start Frame has been initiated the Host Controller will take over driving the SER_IRQ low in the
next clock and will continue driving the SER_IRQ low for a programmable period of three to seven clocks.
This makes a total low pulse width of four to eight clocks. Finally, the Host Controller will drive the
SER_IRQ back high for one clock, then tri-state.
Any SER_IRQ Device (i.e., The SIO10N268) which detects any transition on an IRQ/Data line for which it
is responsible must initiate a Start Frame in order to update the Host Controller unless the SER_IRQ is
already in an SER_IRQ Cycle and the IRQ/Data transition can be delivered in that SER_IRQ Cycle.
2) Continuous (Idle) Mode:
Only the Host controller can initiate a Start Frame to update IRQ/Data line information. All other SER_IRQ
agents become passive and may not initiate a Start Frame. SER_IRQ will be driven low for four to eight
clocks by Host Controller. This mode has two functions. It can be used to stop or idle the SER_IRQ or the
Host Controller can operate SER_IRQ in a continuous mode by initiating a Start Frame at the end of every
Stop Frame.
An SER_IRQ mode transition can only occur during the Stop Frame. Upon reset, SER_IRQ bus is
defaulted to Continuous mode, therefore only the Host controller can initiate the first Start Frame. Slaves
must continuously sample the Stop Frames pulse width to determine the next SER_IRQ Cycle’s mode.
8.14.1.2 SER_IRQ Data Frame
Once a Start Frame has been initiated, the SIO10N268 will watch for the rising edge of the Start Pulse and
start counting IRQ/Data Frames from there. Each IRQ/Data Frame is three clocks: Sample phase,
Recovery phase, and Turn-around phase. During the Sample phase the SIO10N268 drives the SER_IRQ
low, if and only if, its last detected IRQ/Data value was low. If its detected IRQ/Data value is high,
SER_IRQ is left tri-stated. During the Recovery phase the SIO10N268 drives the SER_IRQ high, if and
only if, it had driven the SER_IRQ low during the previous Sample Phase. During the Turn-around Phase
the SIO10N268 tri-states the SER_IRQ. The SIO10N268 will drive the SER_IRQ line low at the appropriate
sample point if its associated IRQ/Data line is low, regardless of which device initiated the Start Frame.
The Sample Phase for each IRQ/Data follows the low to high transition of the Start Frame pulse by a
number of clocks equal to the IRQ/Data Frame times three, minus one. (e.g. The IRQ5 Sample clock is
the sixth IRQ/Data Frame, (6 x 3) - 1 = 17th clock after the rising edge of the Start Pulse).
Table 8.53 - SER_IRQ Sampling Periods
SER_IRQ PERIOD
SIGNAL SAMPLED
# OF CLOCKS PAST START
1
Not Used
2
IRQ1
5
3
IO_SMI#/IRQ2
8
4
IRQ3
11
5
IRQ4
14
6
IRQ5
17
7
IRQ6
20
8
IRQ7
23
9
IRQ8
26
10
IRQ9
29
11
IRQ10
32
12
IRQ11
35
13
IRQ12
38
14
IRQ13
41
15
IRQ14
44