
Chapter 8. Signal Descriptions
8-7
60x Bus Signal ConTguration
Figure 8-1. 60x Bus Signal Groups
Note that the following sections summarize signal functions. Chapter 9, òSystem Interface
Operation,ó describes many of these signals in greater detail, both with respect to how
individual signals function and how groups of signals interact.
Data
Arbitration
BR
BG
TS
AP[0:3]
GBL
TSIZ[0:2]
AACK
ARTRY
DBG
DBWO
DH[0:31]
DL[0:31]
DP[0:7]
TA
TEA
1
1
1
4
TBST
WT
TT[0:4]
5
1
3
1
1
1
1
1
1
8
32
32
1
1
CI
1
A[0:31]
32
Address
Arbitration
Address
Bus
Address
Termination
Address
Transfer
Attributes
Data
Transfer
Data
Termination
OV
DD
AV
DD
MPC7400
L2OV
DD
L2AV
DD
V
DD
SHD
1
DBB
1
ABB
1
L2 Cache
Address/
Data
SYSCLK
PLL_CFG[0:3]
JTAG/COP
Factory Test
1
5
3
4
1
CLK_OUT
L2ADDR[17:0]
L2DATA[0:63]
L2DP[0:7]
L2CE
L2WE
L2CLK_OUT[A:B]
L2SYNC_OUT
L2SYNC_IN
L2ZZ
L2 Cache
Clock/
Control
Clock
Control
Test
Interface
18
2
1
1
1
64
8
1
1
INT
TBEN
QREQ
MCP
SRESET
SMI
HRESET
CKSTP_IN
QACK
EMODE
CKSTP_OUT
CHK
1
1
1
1
1
1
1
1
1
1
1
1
1
Interrupts/
Resets
Processor
Status/
Control
RSRV
L2VSEL
BVSEL
1
1
Voltage
Select