Chapter 5. Memory Management
5-23
Memory Segment Model
in the page table. The OEA speciTes that the referenced bit may be set immediately, or the
setting may be delayed until the memory access is determined to be successful. Because the
reference to a page is what causes a PTE to be loaded into the TLB, the referenced bit in all
MPC7400 TLB entries is effectively always set. The processor never automatically clears
the referenced bit.
The referenced bit is only a hint to the operating system about the activity of a page. At
times, the referenced bit may be set although the access was not logically required by the
program or even if the access was prevented by memory protection. Examples of this in
PowerPC systems include the following:
¥
Fetching of instructions not subsequently executed
¥
A memory reference caused by a speculatively executed instruction that is
mispredicted
¥
Accesses generated by an
lswx
or
stswx
instruction with a zero length
¥
Accesses generated by an
stwcx.
instruction when no store is performed because a
reservation does not exist
¥
Accesses that cause exceptions and are not completed
5.4.1.2 Changed Bit
The changed bit of a page is located both in the PTE in the page table and in the copy of the
PTE loaded into the TLB (if a TLB is implemented, as in the MPC7400). Whenever a data
store instruction is executed successfully, if the TLB search (for page address translation)
results in a hit, the changed bit in the matching TLB entry is checked. If it is already set, it
is not updated. If the TLB changed bit is 0, the MPC7400 initiates the table search operation
to set the C bit in the corresponding PTE in the page table. The MPC7400 then reloads the
TLB (with the C bit set).
The changed bit (in both the TLB and the PTE in the page tables) is set only when a store
operation is allowed by the page memory protection mechanism and the store is guaranteed
to be in the execution path (unless an exception, other than those caused by the
sc
,
rT
, or
trap instructions, occurs). Furthermore, the following conditions may cause the C bit to be
set:
¥
The execution of an
stwcx.
instruction is allowed by the memory protection
mechanism but a store operation is not performed.
¥
The execution of an
stswx
instruction is allowed by the memory protection
mechanism but a store operation is not performed because the speciTed length is
zero.
¥
The store operation is not performed because an exception occurs before the store is
performed.